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Searched refs:V7M_SCB (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/cpu/armv7m/
H A Dcache.c210 setbits_le32(&V7M_SCB->ccr, BIT(V7M_CCR_DCACHE)); in dcache_enable()
228 clrbits_le32(&V7M_SCB->ccr, BIT(V7M_CCR_DCACHE)); in dcache_disable()
237 return (readl(&V7M_SCB->ccr) & BIT(V7M_CCR_DCACHE)) != 0; in dcache_status()
312 setbits_le32(&V7M_SCB->ccr, BIT(V7M_CCR_ICACHE)); in icache_enable()
321 return (readl(&V7M_SCB->ccr) & BIT(V7M_CCR_ICACHE)) != 0; in icache_status()
330 clrbits_le32(&V7M_SCB->ccr, BIT(V7M_CCR_ICACHE)); in icache_disable()
H A Dcpu.c54 | (V7M_SCB->aircr & V7M_AIRCR_PRIGROUP_MSK) in reset_cpu()
55 | V7M_AIRCR_SYSRESET, &V7M_SCB->aircr); in reset_cpu()
/openbmc/u-boot/arch/arm/include/asm/
H A Darmv7m.h44 #define V7M_SCB ((struct v7m_scb *)V7M_SCB_BASE) macro