| /openbmc/linux/drivers/usb/cdns3/ |
| H A D | Kconfig | 17 tristate "Cadence USB3 Dual-Role Controller"
20 Say Y here if your system has a Cadence USB3 dual-role controller.
30 bool "Cadence USB3 device controller"
40 bool "Cadence USB3 host controller"
51 tristate "Cadence USB3 support on PCIe-based platforms"
62 tristate "Cadence USB3 support on TI platforms"
67 platforms that contain Cadence USB3 controller core.
72 tristate "Cadence USB3 support on NXP i.MX platforms"
77 platforms that contain Cadence USB3 controller core.
82 tristate "Cadence USB3 support on StarFive SoC platforms"
[all …]
|
| /openbmc/linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-g12b-a311d-khadas-vim3.dts | 19 * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
21 * an USB3.0 Type A connector and a M.2 Key M slot.
23 * the USB3.0 controller and the PCIe Controller, thus only
25 * If the MCU is configured to mux the PCIe/USB3.0 differential lines
27 * USB3.0 from the USB Complex and enable the PCIe controller.
|
| H A D | meson-g12b-s922x-khadas-vim3.dts | 19 * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
21 * an USB3.0 Type A connector and a M.2 Key M slot.
23 * the USB3.0 controller and the PCIe Controller, thus only
25 * If the MCU is configured to mux the PCIe/USB3.0 differential lines
27 * USB3.0 from the USB Complex and enable the PCIe controller.
|
| H A D | meson-sm1-khadas-vim3l.dts | 87 * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
89 * an USB3.0 Type A connector and a M.2 Key M slot.
91 * the USB3.0 controller and the PCIe Controller, thus only
93 * If the MCU is configured to mux the PCIe/USB3.0 differential lines
95 * USB3.0 from the USB Complex and enable the PCIe controller.
|
| /openbmc/linux/drivers/phy/socionext/ |
| H A D | Kconfig | 17 of USB3 HS-PHY.
20 tristate "UniPhier USB3 PHY driver"
25 Enable this to support USB PHY implemented in USB3 controller
26 on UniPhier SoCs. This controller supports USB3.0 and lower speed.
|
| /openbmc/u-boot/arch/arm/mach-tegra/tegra210/ |
| H A D | Kconfig | 20 HDMI, USB micro-B port, Ethernet via USB3, USB3 host port, SATA,
29 card slot, HDMI, USB micro-B port, Ethernet via USB3, USB3 host
|
| /openbmc/linux/drivers/usb/dwc3/ |
| H A D | Kconfig | 4 tristate "DesignWare USB3 DRD Core Support"
11 USB controller based on the DesignWare USB3 IP Core.
74 Exynos5800, Exynos5433, Exynos7) ship with one DesignWare Core USB3
118 Currently supports Xilinx and Qualcomm DWC USB3 IP.
126 STMicroelectronics SoCs with one DesignWare Core USB3 IP
158 Support Xilinx SoCs with DesignWare Core USB3 IP.
167 Support TI's AM62 platforms with DesignWare Core USB3 IP.
168 The Designware Core USB3 IP is programmed to operate in
177 Support Cavium Octeon platforms with DesignWare Core USB3 IP.
|
| /openbmc/u-boot/drivers/usb/dwc3/ |
| H A D | Kconfig | 2 bool "DesignWare USB3 DRD Core Support"
6 USB controller based on the DesignWare USB3 IP Core.
48 bool "DesignWare USB3 Host Support on UniPhier Platforms"
59 Enable single driver for both USB2 PHY programming and USB3 PHY
|
| /openbmc/linux/drivers/usb/gadget/udc/bdc/ |
| H A D | Kconfig | 4 tristate "Broadcom USB3.0 device controller IP driver(BDC)"
9 BDC is Broadcom's USB3.0 device controller IP. If your SOC has a BDC IP
|
| /openbmc/linux/Documentation/devicetree/bindings/phy/ |
| H A D | socionext,uniphier-usb2-phy.yaml | 12 Pro4 SoC has both USB2 and USB3 host controllers, however, this USB3
14 USB2 PHY instead of USB3 HS-PHY.
|
| H A D | phy-mvebu.txt | 26 Armada 375 comes with an USB2 host and device controller and an USB3
35 values are 1 (USB2), 2 (USB3).
|
| H A D | nvidia,tegra194-xusb-padctl.yaml | 381 supported speed of a USB3 port.
384 - description: The USB3 port supports USB 3.1 Gen 2 speed.
387 - description: The USB3 port supports USB 3.1 Gen 1 speed
414 supported speed of a USB3 port.
417 - description: The USB3 port supports USB 3.1 Gen 2 speed.
420 - description: The USB3 port supports USB 3.1 Gen 1 speed
447 supported speed of a USB3 port.
450 - description: The USB3 port supports USB 3.1 Gen 2 speed.
453 - description: The USB3 port supports USB 3.1 Gen 1 speed
480 supported speed of a USB3 port.
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | mvebu-gated-clock.txt | 39 16 usb3 USB3 Host
65 9 usb3h0 USB3 Host 0
66 10 usb3h1 USB3 Host 1
67 11 usb3d USB3 Device
88 9 usb3h0 USB3 Host 0
89 10 usb3h1 USB3 Host 1
|
| /openbmc/linux/Documentation/devicetree/bindings/usb/ |
| H A D | nvidia,tegra124-xusb.yaml | 13 description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
109 description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
112 description: PCIe/USB3 digital logic power supply. Must supply 1.05 V.
124 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
127 description: High-voltage PCIe/USB3 power supply. Must supply 3.3 V.
|
| H A D | nvidia,tegra186-xusb.yaml | 13 description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
105 description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
108 description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
120 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
|
| H A D | nvidia,tegra194-xusb.yaml | 13 description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
106 description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
109 description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
121 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
|
| H A D | mediatek,mtk-xhci.yaml | 8 title: MediaTek USB3 xHCI
99 - description: USB3/SS(P) PHY
101 - description: USB3/SS(P) PHY
103 - description: USB3/SS(P) PHY
105 - description: USB3/SS(P) PHY
|
| H A D | nvidia,tegra210-xusb.yaml | 13 description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
112 description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
115 description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
127 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
|
| H A D | amlogic,meson-g12a-usb-ctrl.yaml | 14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY.
28 The Amlogic GXL, GXM & AXG SoCs doesn't embed an USB3 PHY.
115 - const: usb3-phy0 # USB3 PHY if USB3_0 is used
|
| H A D | ti,keystone-dwc3.yaml | 47 PHY specifier for the USB3.0 PHY. Some SoCs need the USB3.0 PHY
|
| /openbmc/linux/Documentation/devicetree/bindings/soc/socionext/ |
| H A D | socionext,uniphier-dwc3-glue.yaml | 7 title: Socionext UniPhier SoC DWC3 USB3.0 glue layer
13 DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is
15 USB3.0 component.
|
| /openbmc/u-boot/arch/arm/mach-mediatek/ |
| H A D | Kconfig | 21 Peripherals include Gigabit Ethernet, switch, USB3.0 and OTG, PCIe,
32 switch, USB3.0, PCIe, UART, SPI, I2C and PWM.
|
| /openbmc/linux/Documentation/driver-api/usb/ |
| H A D | usb3-debug-port.rst | 2 USB3 debug port
11 This is a HOWTO for using the USB3 debug port on x86 systems.
13 Before using any kernel debugging functionality based on USB3
16 1) check whether any USB3 debug port is available in
29 device through the debug port (normally the first USB3
|
| /openbmc/linux/Documentation/devicetree/bindings/regulator/ |
| H A D | socionext,uniphier-regulator.yaml | 10 This regulator controls VBUS and belongs to USB3 glue layer. Before using
17 # USB3 Controller
|
| /openbmc/linux/drivers/phy/allwinner/ |
| H A D | Kconfig | 50 tristate "Allwinner H6 SoC USB3 PHY driver"
56 Enable this to support the USB3.0-capable transceiver that is
|