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Searched refs:UART2_SEL (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dexynos5_setup.h637 #define UART2_SEL 6 macro
643 | (UART2_SEL << 8) \
806 #define UART2_SEL 3 macro
814 | (UART2_SEL << 12) \
H A Dexynos4_setup.h238 #define UART2_SEL UART_SEL_SCLKMPLL macro
243 | (UART2_SEL << 8) \
/openbmc/u-boot/board/samsung/odroid/
H A Dodroid.c278 clr = UART0_SEL(15) | UART1_SEL(15) | UART2_SEL(15) | in board_clock_init()
288 set = UART0_SEL(6) | UART1_SEL(6) | UART2_SEL(6) | UART3_SEL(6) | in board_clock_init()
H A Dsetup.h157 #define UART2_SEL(x) (((x) & 0xf) << 8) macro
/openbmc/u-boot/board/samsung/trats/
H A Dsetup.h190 #define UART2_SEL UART_SEL_SCLKMPLL macro
197 | (UART2_SEL << 8) \