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Searched refs:TX_ENABLE (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/sound/soc/ux500/
H A Dux500_msp_i2s.c402 writel(reg_val_GCR | TX_ENABLE, msp->registers + MSP_GCR); in flush_fifo_tx()
505 writel(reg_val_GCR & ~TX_ENABLE, msp->registers + MSP_GCR); in disable_msp_tx()
534 (~TX_ENABLE)), msp->registers + MSP_GCR); in disable_msp()
569 enable_bit = TX_ENABLE; in ux500_msp_i2s_trigger()
H A Dux500_msp_i2s.h44 #define TX_ENABLE 0x00000100 macro
/openbmc/linux/sound/soc/tegra/
H A Dtegra210_admaif.h62 #define TX_ENABLE BIT(TX_ENABLE_SHIFT) macro
H A Dtegra210_admaif.c328 val = TX_ENABLE; in tegra_admaif_start()
355 enable = TX_ENABLE; in tegra_admaif_stop()
/openbmc/linux/drivers/atm/
H A Dhe.h701 #define TX_ENABLE (1<<28) macro
H A Dhe.c1494 reg |= TX_ENABLE|ER_ENABLE; in he_start()
1545 reg &= ~(TX_ENABLE|ER_ENABLE); in he_stop()
/openbmc/qemu/hw/char/
H A Dibex_uart.c48 FIELD(CTRL, TX_ENABLE, 0, 1)
/openbmc/linux/drivers/scsi/aic94xx/
H A Daic94xx_reg_def.h1439 #define TX_ENABLE 0x80 macro