/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | ste-dbx5x0-pinctrl.dtsi | 21 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */ 36 pins = "GPIO3_AH3"; /* TXD */ 53 pins = "GPIO5_AG6"; /* TXD */ 64 pins = "GPIO5_AG6"; /* TXD */ 107 pins = "GPIO30_W3"; /* TXD */ 118 pins = "GPIO30_W3"; /* TXD */ 547 "GPIO12_AC4", /* TXD */ 585 "GPIO193_AH27", /* TXD */
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H A D | ste-href-family-pinctrl.dtsi | 28 "GPIO215_AH13", /* TXD */ 45 pins = "GPIO215_AH13"; /* TXD */ 62 pins = "GPIO215_AH13"; /* TXD */
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H A D | ste-snowball.dts | 574 "GPIO146_D13", /* TXD */
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/openbmc/linux/arch/arm64/boot/dts/renesas/ |
H A D | rzg2ul-smarc-pinfunction.dtsi | 118 <RZG2L_PORT_PINMUX(3, 2, 2)>, /* TXD */
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H A D | rzg2lc-smarc-pinfunction.dtsi | 128 <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
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H A D | rzg2l-smarc-pinfunction.dtsi | 142 <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
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/openbmc/linux/arch/arm/boot/dts/microchip/ |
H A D | sama5d4.dtsi | 1360 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */ 1369 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE /* TXD */ 1378 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */ 1393 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */ 1408 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD - conflicts with G0_COL, PCK2 */ 1423 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */ 1432 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
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H A D | lan966x-kontron-kswitch-d10-mmt.dtsi | 98 /* RXD, TXD */
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H A D | lan966x-pcb8309.dts | 136 /* RXD, TXD */
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H A D | at91-tse850-3.dts | 325 /* 28 */ "RXD", "TXD", "BRX", "BTX";
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/openbmc/linux/drivers/mtd/nand/raw/ |
H A D | mxic_nand.c | 63 #define TXD(x) (0x14 + ((x) * 4)) macro 361 writel(data, nfc->regs + TXD(nbytes % 4)); in mxic_nfc_data_xfer()
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/openbmc/linux/drivers/mailbox/ |
H A D | bcm-pdc-mailbox.c | 70 #define TXD(x, max_mask) XXD((x), (max_mask)) macro 72 #define NEXTTXD(i, max_mask) TXD((i) + 1, (max_mask)) 73 #define PREVTXD(i, max_mask) TXD((i) - 1, (max_mask)) 76 #define NTXDACTIVE(h, t, max_mask) TXD((t) - (h), (max_mask))
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | rockchip-dwmac.yaml | 95 description: Delay value for TXD timing.
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H A D | xlnx,axi-ethernet.yaml | 98 - description: AXI4-Stream clock for TXD RXD TXC and RXS interfaces.
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/openbmc/u-boot/arch/arm/dts/ |
H A D | sama5d4.dtsi | 1821 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */ 1830 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* TXD */ 1839 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */ 1854 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */ 1869 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD - conflicts with G0_COL, PCK2 */ 1886 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */ 1895 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
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/openbmc/linux/Documentation/devicetree/bindings/iio/addac/ |
H A D | adi,ad74115.yaml | 296 3 - Control HART TXD 297 4 - Monitor HART TXD
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/openbmc/linux/arch/arm/boot/dts/renesas/ |
H A D | r7s9210-rza2mevb.dts | 15 * - TXD = CN17-10,
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/openbmc/linux/Documentation/arch/arm/pxa/ |
H A D | mfp.rst | 32 | SSP2 |---(TXD)----+ | | +---------+ 40 | UART2 |---(TXD)--------+
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/openbmc/linux/drivers/spi/ |
H A D | spi-mxic.c | 64 #define TXD(x) (0x14 + ((x) * 4)) macro 364 writel(data, mxic->regs + TXD(nbytes % 4)); in mxic_spi_data_xfer()
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/openbmc/linux/arch/arm/boot/dts/gemini/ |
H A D | gemini-dlink-dir-685.dts | 43 /* Collides with LPC LFRAME, UART RTS, SSP TXD */
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/openbmc/u-boot/doc/device-tree-bindings/pinctrl/ |
H A D | pinctrl-bindings.txt | 209 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3326-odroid-go.dtsi | 539 /* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8x-colibri.dtsi | 451 /* Colibri optional CAN on UART_A TXD/RXD */
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/openbmc/linux/Documentation/networking/ |
H A D | phy.rst | 87 for the transmit data lines (TXD[3:0]) processed by the PHY device
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/openbmc/linux/Documentation/driver-api/ |
H A D | pin-control.rst | 437 (these are four pins: CLK, RXD, TXD, FRM). In that case, pin B5 can be used as
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