Searched refs:TSI148_LCSR_OT (Results 1 – 2 of 2) sorted by relevance
890 temp_ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()893 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()993 iowrite32be(pci_base_high, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()995 iowrite32be(pci_base_low, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()999 iowrite32be(pci_bound_low, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()1007 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()1013 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()1049 ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] + in __tsi148_master_get()1054 pci_base_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] + in __tsi148_master_get()1368 pci_addr_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_rmw()[all …]
197 static const int TSI148_LCSR_OT[8] = { TSI148_LCSR_OT0, TSI148_LCSR_OT1, variable