890 	temp_ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
893 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
993 	iowrite32be(pci_base_high, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
995 	iowrite32be(pci_base_low, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
997 	iowrite32be(pci_bound_high, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
999 	iowrite32be(pci_bound_low, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1001 	iowrite32be(vme_offset_high, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1003 	iowrite32be(vme_offset_low, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1007 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1013 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1049 	ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1052 	pci_base_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1054 	pci_base_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1056 	pci_bound_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1058 	pci_bound_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1060 	vme_offset_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1062 	vme_offset_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1366 	pci_addr_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_rmw()
1368 	pci_addr_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_rmw()
2552 		iowrite32be(0, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_remove()