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Searched refs:TIMER_BASE (Results 1 – 11 of 11) sorted by relevance

/openbmc/qemu/tests/qtest/
H A Dsse-timer-test.c24 #define TIMER_BASE 0x48000000 macro
73 writel(TIMER_BASE + CNTP_CTL, 0); in reset_counter_and_timer()
74 writel(TIMER_BASE + CNTP_AIVAL_CTL, 0); in reset_counter_and_timer()
123 writel(TIMER_BASE + CNTP_CTL, 1); in test_timer()
132 writel(TIMER_BASE + CNTP_CVAL_HI, 0); in test_timer()
144 writel(TIMER_BASE + CNTP_AIVAL_CTL, 1); in test_timer()
165 writel(TIMER_BASE + CNTP_AIVAL_CTL, 1); in test_timer()
181 writel(TIMER_BASE + CNTP_AIVAL_CTL, 0); in test_timer()
187 writel(TIMER_BASE + CNTP_AIVAL_CTL, 1); in test_timer()
202 writel(TIMER_BASE + CNTP_CTL, 1); in test_timer_scale_change()
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H A Dcmsdk-apb-dualtimer-test.c21 #define TIMER_BASE 0x40002000 macro
50 g_assert_true(readl(TIMER_BASE + TIMER1RIS) == 0); in test_dualtimer()
53 writel(TIMER_BASE + TIMER1LOAD, 1000); in test_dualtimer()
59 g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 0); in test_dualtimer()
75 writel(TIMER_BASE + TIMER1INTCLR, 1); in test_dualtimer()
79 writel(TIMER_BASE + TIMER1CONTROL, 0); in test_dualtimer()
84 g_assert_true(readl(TIMER_BASE + TIMER2RIS) == 0); in test_prescale()
87 writel(TIMER_BASE + TIMER2LOAD, 1000); in test_prescale()
89 writel(TIMER_BASE + TIMER2CONTROL, in test_prescale()
107 writel(TIMER_BASE + TIMER2INTCLR, 1); in test_prescale()
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H A Dcmsdk-apb-timer-test.c21 #define TIMER_BASE 0x40000000 macro
30 g_assert_true(readl(TIMER_BASE + INTSTATUS) == 0); in test_timer()
33 writel(TIMER_BASE + RELOAD, 1000); in test_timer()
34 writel(TIMER_BASE + CTRL, 9); in test_timer()
38 g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), ==, 0); in test_timer()
39 g_assert_cmpuint(readl(TIMER_BASE + VALUE), ==, 500); in test_timer()
44 g_assert_cmpuint(readl(TIMER_BASE + VALUE), ==, 0); in test_timer()
48 g_assert_cmpuint(readl(TIMER_BASE + VALUE), ==, 1000); in test_timer()
51 writel(TIMER_BASE + INTSTATUS, 0); in test_timer()
53 writel(TIMER_BASE + INTSTATUS, 1); in test_timer()
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/openbmc/u-boot/arch/arm/cpu/arm1136/mx31/
H A Dtimer.c11 #define TIMER_BASE 0x53f90000 /* General purpose timer 1 */ macro
14 #define GPTCR __REG(TIMER_BASE) /* Control register */
15 #define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */
16 #define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */
17 #define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
/openbmc/qemu/hw/timer/
H A Dgrlib_gptimer.c57 #define TIMER_BASE 0x10 macro
207 timer_addr = (addr % TIMER_BASE); in grlib_gptimer_read()
208 id = (addr - TIMER_BASE) / TIMER_BASE; in grlib_gptimer_read()
271 timer_addr = (addr % TIMER_BASE); in grlib_gptimer_write()
272 id = (addr - TIMER_BASE) / TIMER_BASE; in grlib_gptimer_write()
/openbmc/u-boot/arch/arm/cpu/arm920t/ep93xx/
H A Dtimer.c42 struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE; in read_timer()
88 struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE; in timer_init()
/openbmc/linux/drivers/comedi/drivers/
H A Dcb_pcidas64.c81 #define TIMER_BASE 25 /* 40MHz master clock */ macro
1992 divisor = DIV_ROUND_UP(ns, TIMER_BASE); in get_divisor()
1995 divisor = ns / TIMER_BASE; in get_divisor()
1999 divisor = DIV_ROUND_CLOSEST(ns, TIMER_BASE); in get_divisor()
2053 cmd->scan_begin_arg = scan_divisor * TIMER_BASE; in check_adc_timing()
2268 return cmd->convert_arg / TIMER_BASE - 3; in ai_convert_counter_6xxx()
2281 TIMER_BASE; in ai_scan_counter_6xxx()
2284 count = cmd->convert_arg / TIMER_BASE; in ai_scan_counter_6xxx()
2300 divisor = cmd->scan_begin_arg / TIMER_BASE; in ai_convert_counter_4020()
3378 TIMER_BASE; in ao_cmdtest()
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H A Dni_pcidio.c246 #define TIMER_BASE 50 /* nanoseconds */ macro
508 base = TIMER_BASE; in ni_pcidio_ns_to_timer()
560 #define MAX_SPEED (TIMER_BASE) /* in nanoseconds */ in ni_pcidio_cmdtest()
H A Dgsc_hpdi.c111 #define TIMER_BASE 50 /* 20MHz master clock */ macro
/openbmc/u-boot/arch/arm/include/asm/arch-ep93xx/
H A Dep93xx.h421 #define TIMER_BASE (EP93XX_APB_BASE | TIMER_OFFSET) macro
/openbmc/linux/arch/powerpc/sysdev/
H A Dmpic.c1360 mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000); in mpic_alloc()