1*9bc064b5SPeter Maydell /*
2*9bc064b5SPeter Maydell  * QTest testcase for the CMSDK APB dualtimer device
3*9bc064b5SPeter Maydell  *
4*9bc064b5SPeter Maydell  * Copyright (c) 2021 Linaro Limited
5*9bc064b5SPeter Maydell  *
6*9bc064b5SPeter Maydell  * This program is free software; you can redistribute it and/or modify it
7*9bc064b5SPeter Maydell  * under the terms of the GNU General Public License as published by the
8*9bc064b5SPeter Maydell  * Free Software Foundation; either version 2 of the License, or
9*9bc064b5SPeter Maydell  * (at your option) any later version.
10*9bc064b5SPeter Maydell  *
11*9bc064b5SPeter Maydell  * This program is distributed in the hope that it will be useful, but WITHOUT
12*9bc064b5SPeter Maydell  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13*9bc064b5SPeter Maydell  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14*9bc064b5SPeter Maydell  * for more details.
15*9bc064b5SPeter Maydell  */
16*9bc064b5SPeter Maydell 
17*9bc064b5SPeter Maydell #include "qemu/osdep.h"
18*9bc064b5SPeter Maydell #include "libqtest-single.h"
19*9bc064b5SPeter Maydell 
20*9bc064b5SPeter Maydell /* IoTKit/ARMSSE dualtimer; driven at 25MHz in mps2-an385, so 40ns per tick */
21*9bc064b5SPeter Maydell #define TIMER_BASE 0x40002000
22*9bc064b5SPeter Maydell 
23*9bc064b5SPeter Maydell #define TIMER1LOAD 0
24*9bc064b5SPeter Maydell #define TIMER1VALUE 4
25*9bc064b5SPeter Maydell #define TIMER1CONTROL 8
26*9bc064b5SPeter Maydell #define TIMER1INTCLR 0xc
27*9bc064b5SPeter Maydell #define TIMER1RIS 0x10
28*9bc064b5SPeter Maydell #define TIMER1MIS 0x14
29*9bc064b5SPeter Maydell #define TIMER1BGLOAD 0x18
30*9bc064b5SPeter Maydell 
31*9bc064b5SPeter Maydell #define TIMER2LOAD 0x20
32*9bc064b5SPeter Maydell #define TIMER2VALUE 0x24
33*9bc064b5SPeter Maydell #define TIMER2CONTROL 0x28
34*9bc064b5SPeter Maydell #define TIMER2INTCLR 0x2c
35*9bc064b5SPeter Maydell #define TIMER2RIS 0x30
36*9bc064b5SPeter Maydell #define TIMER2MIS 0x34
37*9bc064b5SPeter Maydell #define TIMER2BGLOAD 0x38
38*9bc064b5SPeter Maydell 
39*9bc064b5SPeter Maydell #define CTRL_ENABLE (1 << 7)
40*9bc064b5SPeter Maydell #define CTRL_PERIODIC (1 << 6)
41*9bc064b5SPeter Maydell #define CTRL_INTEN (1 << 5)
42*9bc064b5SPeter Maydell #define CTRL_PRESCALE_1 (0 << 2)
43*9bc064b5SPeter Maydell #define CTRL_PRESCALE_16 (1 << 2)
44*9bc064b5SPeter Maydell #define CTRL_PRESCALE_256 (2 << 2)
45*9bc064b5SPeter Maydell #define CTRL_32BIT (1 << 1)
46*9bc064b5SPeter Maydell #define CTRL_ONESHOT (1 << 0)
47*9bc064b5SPeter Maydell 
test_dualtimer(void)48*9bc064b5SPeter Maydell static void test_dualtimer(void)
49*9bc064b5SPeter Maydell {
50*9bc064b5SPeter Maydell     g_assert_true(readl(TIMER_BASE + TIMER1RIS) == 0);
51*9bc064b5SPeter Maydell 
52*9bc064b5SPeter Maydell     /* Start timer: will fire after 40000 ns */
53*9bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER1LOAD, 1000);
54*9bc064b5SPeter Maydell     /* enable in free-running, wrapping, interrupt mode */
55*9bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER1CONTROL, CTRL_ENABLE | CTRL_INTEN);
56*9bc064b5SPeter Maydell 
57*9bc064b5SPeter Maydell     /* Step to just past the 500th tick and check VALUE */
58*9bc064b5SPeter Maydell     clock_step(500 * 40 + 1);
59*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 0);
60*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 500);
61*9bc064b5SPeter Maydell 
62*9bc064b5SPeter Maydell     /* Just past the 1000th tick: timer should have fired */
63*9bc064b5SPeter Maydell     clock_step(500 * 40);
64*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 1);
65*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 0);
66*9bc064b5SPeter Maydell 
67*9bc064b5SPeter Maydell     /*
68*9bc064b5SPeter Maydell      * We are in free-running wrapping 16-bit mode, so on the following
69*9bc064b5SPeter Maydell      * tick VALUE should have wrapped round to 0xffff.
70*9bc064b5SPeter Maydell      */
71*9bc064b5SPeter Maydell     clock_step(40);
72*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 0xffff);
73*9bc064b5SPeter Maydell 
74*9bc064b5SPeter Maydell     /* Check that any write to INTCLR clears interrupt */
75*9bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER1INTCLR, 1);
76*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 0);
77*9bc064b5SPeter Maydell 
78*9bc064b5SPeter Maydell     /* Turn off the timer */
79*9bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER1CONTROL, 0);
80*9bc064b5SPeter Maydell }
81*9bc064b5SPeter Maydell 
test_prescale(void)82*9bc064b5SPeter Maydell static void test_prescale(void)
83*9bc064b5SPeter Maydell {
84*9bc064b5SPeter Maydell     g_assert_true(readl(TIMER_BASE + TIMER2RIS) == 0);
85*9bc064b5SPeter Maydell 
86*9bc064b5SPeter Maydell     /* Start timer: will fire after 40 * 256 * 1000 == 1024000 ns */
87*9bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER2LOAD, 1000);
88*9bc064b5SPeter Maydell     /* enable in periodic, wrapping, interrupt mode, prescale 256 */
89*9bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER2CONTROL,
90*9bc064b5SPeter Maydell            CTRL_ENABLE | CTRL_INTEN | CTRL_PERIODIC | CTRL_PRESCALE_256);
91*9bc064b5SPeter Maydell 
92*9bc064b5SPeter Maydell     /* Step to just past the 500th tick and check VALUE */
93*9bc064b5SPeter Maydell     clock_step(40 * 256 * 501);
94*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 0);
95*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 500);
96*9bc064b5SPeter Maydell 
97*9bc064b5SPeter Maydell     /* Just past the 1000th tick: timer should have fired */
98*9bc064b5SPeter Maydell     clock_step(40 * 256 * 500);
99*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 1);
100*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 0);
101*9bc064b5SPeter Maydell 
102*9bc064b5SPeter Maydell     /* In periodic mode the tick VALUE now reloads */
103*9bc064b5SPeter Maydell     clock_step(40 * 256);
104*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 1000);
105*9bc064b5SPeter Maydell 
106*9bc064b5SPeter Maydell     /* Check that any write to INTCLR clears interrupt */
107*9bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER2INTCLR, 1);
108*9bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 0);
109*9bc064b5SPeter Maydell 
110*9bc064b5SPeter Maydell     /* Turn off the timer */
111*9bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER2CONTROL, 0);
112*9bc064b5SPeter Maydell }
113*9bc064b5SPeter Maydell 
main(int argc,char ** argv)114*9bc064b5SPeter Maydell int main(int argc, char **argv)
115*9bc064b5SPeter Maydell {
116*9bc064b5SPeter Maydell     int r;
117*9bc064b5SPeter Maydell 
118*9bc064b5SPeter Maydell     g_test_init(&argc, &argv, NULL);
119*9bc064b5SPeter Maydell 
120*9bc064b5SPeter Maydell     qtest_start("-machine mps2-an385");
121*9bc064b5SPeter Maydell 
122*9bc064b5SPeter Maydell     qtest_add_func("/cmsdk-apb-dualtimer/dualtimer", test_dualtimer);
123*9bc064b5SPeter Maydell     qtest_add_func("/cmsdk-apb-dualtimer/prescale", test_prescale);
124*9bc064b5SPeter Maydell 
125*9bc064b5SPeter Maydell     r = g_test_run();
126*9bc064b5SPeter Maydell 
127*9bc064b5SPeter Maydell     qtest_end();
128*9bc064b5SPeter Maydell 
129*9bc064b5SPeter Maydell     return r;
130*9bc064b5SPeter Maydell }
131