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Searched refs:TEGRA234_CLK_PLLP_OUT0 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234-p3768-0000+p3767-0000.dts43 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
H A Dtegra234.dtsi183 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
709 &bpmp TEGRA234_CLK_PLLP_OUT0>;
711 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
728 &bpmp TEGRA234_CLK_PLLP_OUT0>;
730 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
747 &bpmp TEGRA234_CLK_PLLP_OUT0>;
749 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
766 &bpmp TEGRA234_CLK_PLLP_OUT0>;
768 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
785 &bpmp TEGRA234_CLK_PLLP_OUT0>;
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H A Dtegra234-p3768-0000.dtsi37 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
H A Dtegra234-p3737-0000+p3701-0000.dts38 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
/openbmc/linux/include/dt-bindings/clock/
H A Dtegra234-clock.h205 #define TEGRA234_CLK_PLLP_OUT0 102U macro