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Searched refs:T2 (Results 1 – 18 of 18) sorted by relevance

/openbmc/qemu/include/exec/
H A Dhelper-info.c.inc32 #define DEF_HELPER_FLAGS_2(NAME, FLAGS, RET, T1, T2) \
37 | dh_typemask(T2, 2) \
40 #define DEF_HELPER_FLAGS_3(NAME, FLAGS, RET, T1, T2, T3) \
45 | dh_typemask(T2, 2) | dh_typemask(T3, 3) \
48 #define DEF_HELPER_FLAGS_4(NAME, FLAGS, RET, T1, T2, T3, T4) \
53 | dh_typemask(T2, 2) | dh_typemask(T3, 3) \
57 #define DEF_HELPER_FLAGS_5(NAME, FLAGS, RET, T1, T2, T3, T4, T5) \
62 | dh_typemask(T2, 2) | dh_typemask(T3, 3) \
66 #define DEF_HELPER_FLAGS_6(NAME, FLAGS, RET, T1, T2, T3, T4, T5, T6) \
71 | dh_typemask(T2, 2) | dh_typemask(T3, 3) \
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/openbmc/qemu/target/riscv/
H A Dvector_internals.h143 #define OPIVV1(NAME, TD, T2, TX2, HD, HS2, OP) \ argument
146 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
182 #define OPIVV2(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
186 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
210 #define OPIVX2(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
213 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
H A Dvcrypto_helper.c515 uint64_t T2 = sum0_64(a) + maj(a, b, c); in vsha2c_64() local
524 a = T1 + T2; in vsha2c_64()
527 T2 = sum0_64(a) + maj(a, b, c); in vsha2c_64()
535 a = T1 + T2; in vsha2c_64()
549 uint32_t T2 = sum0_32(a) + maj(a, b, c); in vsha2c_32() local
558 a = T1 + T2; in vsha2c_32()
561 T2 = sum0_32(a) + maj(a, b, c); in vsha2c_32()
569 a = T1 + T2; in vsha2c_32()
H A Dvector_helper.c1940 #define OPIVV3(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
1944 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
1986 #define OPIVX3(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
1989 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
2191 #define OPIVV2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
2197 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
2319 #define OPIVX2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
2324 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
3111 #define OPFVV2(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ in RVVCALL() argument
3116 TX2 s2 = *((T2 *)vs2 + HS2(i)); \ in RVVCALL()
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/openbmc/u-boot/fs/zfs/
H A Dzfs_sha256.c79 uint32_t a, b, c, d, e, f, g, h, t, T1, T2, W[64]; in SHA256Transform() local
93 T2 = SIGMA0(a) + Maj(a, b, c); in SHA256Transform()
95 d = c; c = b; b = a; a = T1 + T2; in SHA256Transform()
/openbmc/sdbusplus/include/sdbusplus/message/
H A Dtypes.hpp240 template <typename T1, typename T2>
241 struct type_id<std::pair<T1, T2>>
245 type_id_v<type_id_downcast_t<T1>>, type_id_v<type_id_downcast_t<T2>>,
H A Dappend.hpp264 template <typename T1, typename T2>
265 struct append_single<std::pair<T1, T2>>
271 std::tuple_cat(types::type_id_nonull<T1>(), types::type_id<T2>())); in op()
/openbmc/openbmc/poky/bitbake/lib/prserv/
H A Ddb.py224 … (SELECT version, pkgarch, max(value) as maxvalue FROM %s GROUP BY version, pkgarch) as T2 \
225 …WHERE T1.version=T2.version AND T1.pkgarch=T2.pkgarch AND T1.value=T2.maxvalue " % (self.table, se…
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/dvb-apps/files/dvb-scan-table/dvb-t/
H A Dco-All2 # DVB-T2, 470-860MHz, 6MHz bandwidth
/openbmc/phosphor-networkd/src/
H A Dconfig_parser.hpp54 template <typename T2, typename Check2>
55 constexpr bool operator==(const Checked<T2, Check2>& rhs) const noexcept in operator ==() argument
/openbmc/u-boot/doc/device-tree-bindings/video/
H A Dintel-gma.txt18 - intel,panel-power-up-delay : T1+T2 time sequence
/openbmc/openbmc/meta-facebook/meta-yosemite4/recipes-phosphor/fans/phosphor-pid-control/
H A Dmonitor-pldm-sensor102 T2)
/openbmc/qemu/target/loongarch/tcg/
H A Dvec_helper.c1352 #define SSRLNS(NAME, T1, T2, T3) \ argument
1353 static T1 do_ssrlns_ ## NAME(T2 e2, int sa, int sh) \
1398 #define SSRANS(E, T1, T2) \ argument
1407 T2 mask; \
1446 #define SSRLNU(E, T1, T2, T3) \ argument
1455 T2 mask; \
1492 #define SSRANU(E, T1, T2, T3) \ argument
1504 T2 mask; \
1793 #define SSRLRNS(E1, E2, T1, T2, T3) \ argument
1794 static T1 do_ssrlrns_ ## E1(T2 e2, int sa, int sh) \
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/openbmc/ipmitool/src/plugins/lan/
H A Dmd5.c66 #define T2 /* 0xe8c7b756 */ (T_MASK ^ 0x173848a9) macro
208 SET(d, a, b, c, 1, 12, T2); in md5_process()
/openbmc/qemu/target/arm/tcg/
H A Dmve.decode101 # VSHLL encoding T2 where shift == esize
221 # The VSHLL T2 encoding is not a @2op pattern, but is here because it
633 # VSHLL T1 encoding; the T2 VSHLL encoding is elsewhere in this file
699 # encodings T1, T2, T3 and the fc bits. These include VPT, which is
H A Dt32.decode470 PLD 1111 1000 0001 ---- 1111 1100 -------- # (immediate T2)
490 PLDW 1111 1000 0011 ---- 1111 1100 -------- # (immediate T2)
518 PLI 1111 1001 0001 ---- 1111 1100 -------- # (immediate T2)
/openbmc/u-boot/board/buffalo/lsxl/
H A Dkwbimage-lsxhl.cfg38 # bit4: 1, T2 mode, addr/cmd are driven for two cycles
/openbmc/qemu/pc-bios/
H A Dqemu.rsrc304 $"0212 4454 9552 0254 3220 8521 8422 8023" /* ..DTïR.T2 Ö!Ñ"Ä# */