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Searched refs:Ser4SSCR1 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/arm/mach-sa1100/
H A Dssp.c161 ssp->cr1 = Ser4SSCR1; in ssp_save_state()
177 Ser4SSCR1 = ssp->cr1; in ssp_restore_state()
H A Djornada720_ssp.c152 Ser4SSCR1 = 0x18; in jornada_ssp_probe()
/openbmc/linux/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h754 #define Ser4SSCR1 __REG(0x80070064) /* Ser. port 4 SSP Control Reg. 1 */ macro
/openbmc/u-boot/include/
H A DSA-1100.h1030 #define Ser4SSCR1 /* Ser. port 4 SSP Control Reg. 1 */ \ macro