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Searched refs:Ser0UDCWC (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h119 #define Ser0UDCWC __REG(0x80000020) /* Ser. port 0 UDC Write Count reg. end-point 0 */ macro
/openbmc/u-boot/include/
H A DSA-1100.h257 #define Ser0UDCWC /* Ser. port 0 UDC Write Count */ \ macro