Searched refs:SYS_CLK_WD (Results 1 – 3 of 3) sorted by relevance
165 #define SYS_CLK_WD 17 macro
292 GATE(SYS_CLK_WD, "wd_sys", "sys", 0x8, 17),
748 clocks = <&clk_periph PERIPH_CLK_WD>, <&cr_periph SYS_CLK_WD>;