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Searched refs:SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dfreeze_controller.c33 writel(SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW, &freeze_controller_base->src); in sys_mgr_frzctrl_freeze_req()
115 writel(SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW, &freeze_controller_base->src); in sys_mgr_frzctrl_thaw_req()
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dfreeze_controller.h25 #define SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW 0x0 macro