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Searched refs:SYSCON_CLKSET_PLL_X1FBD1_SHIFT (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c31 rate *= ((clkset >> SYSCON_CLKSET_PLL_X1FBD1_SHIFT) & 0x1f) + 1; in get_PLLCLK()
/openbmc/u-boot/board/cirrus/edb93xx/
H A Dedb93xx.c32 24 << SYSCON_CLKSET_PLL_X1FBD1_SHIFT | \
/openbmc/u-boot/arch/arm/include/asm/arch-ep93xx/
H A Dep93xx.h635 #define SYSCON_CLKSET_PLL_X1FBD1_SHIFT 11 macro