| /openbmc/u-boot/board/freescale/p1010rdb/ |
| H A D | README.P1010RDB-PB | 67 SW4[1:4]= 1010
73 SW4[1:4]= 1111 and SW3[3:4]= 00 for 16bit NOR boot
74 SW4[1:4]= 1010 and SW3[3:4]= 01 for 8bit NAND boot
75 SW4[1:4]= 0110 and SW3[3:4]= 00 for SPI boot
76 SW4[1:4]= 0111 and SW3[3:4]= 10 for SD boot
153 set SW1[8]=0, SW4[1:4]= 1111 and SW3[3:4]= 00, then power on the board
157 set SW1[8]=1, SW4[1:4]= 1111 and SW3[3:4]= 00, then power on the board
162 Set SW4[1:4]= 1010 and SW3[3:4]= 01, then power on the board
168 set SW4[1:4]= 0110 and SW3[3:4]= 00, then power on the board
175 set SW4[1:4]= 0111 and SW3[3:4]= 10, then power on the board
|
| H A D | README.P1010RDB-PA | 82 SW4[1:4]= 1111 and SW6[4]=0 for boot from 16bit NOR flash
83 SW4[1:4]= 1000 and SW6[4]=1 for boot from 8bit NAND flash
84 SW4[1:4]= 0110 and SW6[4]=0 for boot from SPI flash
111 3. Check SW4[1:4]= 1111 and SW6[4]=0, then power on.
146 3. Check SW4[1:4]= 1000 and SW6[4]=1, then power on.
165 3. Check SW4[1:4]= 0110 and SW6[4]=0, then power on.
|
| /openbmc/u-boot/board/freescale/common/ |
| H A D | mc34vr500.c | 30 if (sw > SW4) { in mc34vr500_get_sw_volt()
69 if (sw > SW4 || sw_volt < 625) in mc34vr500_set_sw_volt()
|
| /openbmc/u-boot/board/freescale/ls1088a/ |
| H A D | README | 19 SW4 1001 0011
26 SW4 1001 0011
33 SW4 1001 0011
94 SW4 0010 0000
|
| /openbmc/u-boot/board/freescale/ls1046ardb/ |
| H A D | ls1046ardb.c | 112 return mc34vr500_get_sw_volt(SW4); in get_serdes_volt()
117 return mc34vr500_set_sw_volt(SW4, svdd); in set_serdes_volt()
|
| /openbmc/linux/Documentation/devicetree/bindings/regulator/ |
| H A D | pv88060.txt | 11 BUCK1, LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7, SW1, SW2, SW3, SW4,
104 SW4 {
|
| /openbmc/u-boot/board/freescale/mpc8641hpcn/ |
| H A D | README | 48 SW4(1-2) = 11 CONFIG_SYS_HOSTMODE = 11 :: both prots host/root
49 SW4(3-4) = 11 CONFIG_SYS_BOOTSEQ = 11 :: no boot seq
50 SW4(5-8) = 0011 CONFIG_SYS_IOPORT = 0011 :: both PEX
|
| /openbmc/u-boot/include/power/ |
| H A D | mc34vr500_pmic.h | 168 SW4, enumerator
|
| /openbmc/u-boot/board/freescale/mpc837xemds/ |
| H A D | README | 17 SW4[8] is the bit labeled 8 on Switch 4.
27 SW4[1-8]= 0000_0110 (core PLL setting)
|
| /openbmc/u-boot/doc/ |
| H A D | README.mpc85xxcds | 135 SW4=10001000
160 SW4=11111110
174 SW4=11110011
|
| /openbmc/u-boot/board/freescale/mpc832xemds/ |
| H A D | README | 18 SW4[8] is the bit labeled 8 on Switch 4.
29 SW4[1-8]= 0001_0010 (Flash boot on local bus, system PLL setting)
|
| /openbmc/linux/arch/arm64/boot/dts/renesas/ |
| H A D | ebisu.dtsi | 99 label = "SW4-1";
106 label = "SW4-2";
113 label = "SW4-3";
120 label = "SW4-4";
|
| H A D | salvator-common.dtsi | 133 label = "SW4-1";
140 label = "SW4-2";
147 label = "SW4-3";
154 label = "SW4-4";
|
| H A D | rzg2lc-smarc.dtsi | 149 * SW4 should be at position 2->3 so that SER0_RTS# line is activated
|
| H A D | rzg2l-smarc.dtsi | 140 * SW4 should be at position 2->3 so that SER0_RTS# line is activated
|
| /openbmc/linux/arch/arm/boot/dts/microchip/ |
| H A D | pm9g45.dts | 174 label = "SW4";
|
| /openbmc/linux/drivers/regulator/ |
| H A D | cpcap-regulator.c | 339 CPCAP_REG(SW4, CPCAP_REG_S4C1, CPCAP_REG_ASSIGN2,
415 CPCAP_REG(SW4, CPCAP_REG_S4C1, CPCAP_REG_ASSIGN2,
|
| H A D | pv88060-regulator.c | 220 PV88060_SW(PV88060, SW4, 5000000),
|
| H A D | ltc3676.c | 228 LTC3676_LINEAR_REG(SW4, sw4, BUCK4, DVB4A),
|
| /openbmc/u-boot/board/freescale/mx35pdk/ |
| H A D | README | 77 (SW1-SW2) and on the DEBUG board (SW4-SW10).
|
| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | mc13xxx.txt | 89 sw4 : regulator SW4 (register 27, bit 0)
|
| /openbmc/linux/arch/arm/boot/dts/nxp/mxs/ |
| H A D | imx28-eukrea-mbmx28lc.dtsi | 41 label = "SW4";
|
| /openbmc/linux/arch/arm/boot/dts/renesas/ |
| H A D | r8a7740-armadillo800eva.dts | 90 label = "SW4";
|
| /openbmc/linux/Documentation/hid/ |
| H A D | hid-alps.rst | 114 1 0 0 SW6 SW5 SW4 SW3 SW2 SW1
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | r8a7794-silk.dts | 59 label = "SW4";
|