Searched refs:SUNXI_SRAMC_BASE (Results 1 – 9 of 9) sorted by relevance
/openbmc/u-boot/arch/arm/mach-sunxi/ |
H A D | board.c | 165 setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800); in s_init() 170 setbits_le32(SUNXI_SRAMC_BASE + 0x24, (1 << 15)); in s_init() 171 version = readl(SUNXI_SRAMC_BASE + 0x24) >> 16; in s_init() 172 clrbits_le32(SUNXI_SRAMC_BASE + 0x24, (1 << 15)); in s_init() 181 setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800); in s_init() 183 setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0xc0); in s_init() 186 setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0xc0); in s_init()
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H A D | cpu_info.c | 46 setbits_le32(SUNXI_SRAMC_BASE + 0x24, (1 << 15)); in sunxi_get_sram_id() 47 id = readl(SUNXI_SRAMC_BASE + 0x24) >> 16; in sunxi_get_sram_id() 48 clrbits_le32(SUNXI_SRAMC_BASE + 0x24, (1 << 15)); in sunxi_get_sram_id()
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H A D | dram_sunxi_dw.c | 279 if ((readl(SUNXI_SRAMC_BASE + 0x24) & 0xff) == 0 && in mctl_h3_zq_calibration_quirk() 280 (readl(SUNXI_SRAMC_BASE + 0xf0) & 0x1) == 0) { in mctl_h3_zq_calibration_quirk()
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/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
H A D | cpu_sun50i_h6.h | 18 #define SUNXI_SRAMC_BASE 0x03000000 macro
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H A D | cpu_sun4i.h | 26 #define SUNXI_SRAMC_BASE 0x01c00000 macro
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/openbmc/u-boot/drivers/video/sunxi/ |
H A D | sunxi_de2.c | 42 reg_value = readl(SUNXI_SRAMC_BASE + 0x04); in sunxi_de2_composer_init() 44 writel(reg_value, SUNXI_SRAMC_BASE + 0x04); in sunxi_de2_composer_init()
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/openbmc/u-boot/drivers/usb/musb-new/ |
H A D | sunxi.c | 177 reg_value = readl(SUNXI_SRAMC_BASE + 0x04); in USBC_ConfigFIFO_Base() 180 writel(reg_value, SUNXI_SRAMC_BASE + 0x04); in USBC_ConfigFIFO_Base()
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/openbmc/u-boot/arch/arm/cpu/armv7/sunxi/ |
H A D | psci.c | 125 SUNXI_SRAMC_BASE + SUN8I_R40_SRAMC_SOFT_ENTRY_REG0); in sunxi_set_entry_address()
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/openbmc/u-boot/drivers/net/ |
H A D | sunxi_emac.c | 508 (struct sunxi_sramc_regs *)SUNXI_SRAMC_BASE; in sunxi_emac_board_setup()
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