/openbmc/linux/tools/testing/radix-tree/ |
H A D | maple.c | 734 #define STORE 1 macro 738 (((x) == STORE) ? \ 1025 case STORE: in check_erase2_testset() 1129 STORE, 140737488347136, 140737488351231, in check_erase2_sets() 1130 STORE, 140721266458624, 140737488351231, in check_erase2_sets() 1132 STORE, 140721266458624, 140721266462719, in check_erase2_sets() 1133 STORE, 94735788949504, 94735789121535, in check_erase2_sets() 1135 STORE, 94735788949504, 94735788965887, in check_erase2_sets() 1136 STORE, 94735788965888, 94735789121535, in check_erase2_sets() 1138 STORE, 94735788965888, 94735789068287, in check_erase2_sets() [all …]
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/openbmc/linux/arch/sparc/lib/ |
H A D | csum_copy.S | 31 #ifndef STORE 32 #define STORE(type,src,addr) type src, [addr] macro 53 EX_ST(STORE(stb, %o4, %o1 + 0x00)) 63 EX_ST(STORE(sth, %o5, %o1 + 0x00)) 112 EX_ST(STORE(stw, %o5, %o1 + 0x00)) 115 EX_ST(STORE(stw, %g1, %o1 + 0x04)) 118 EX_ST(STORE(stw, %g2, %o1 + 0x08)) 121 EX_ST(STORE(stw, %o5, %o1 + 0x0c)) 124 EX_ST(STORE(stw, %g1, %o1 + 0x10)) 127 EX_ST(STORE(stw, %g2, %o1 + 0x14)) [all …]
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H A D | M7memcpy.S | 120 #ifndef STORE 121 #define STORE(type,src,addr) type src, [addr] macro 211 EX_ST(STORE(stb, %o4, %o0), memcpy_retl_o2_plus_o5_plus_1) 238 EX_ST(STORE(stx, %o4, %o0), memcpy_retl_o2_plus_63_64) ! and store 240 EX_ST(STORE(stx, %o3, %o0+8), memcpy_retl_o2_plus_63_56) 242 EX_ST(STORE(stx, %o4, %o0+16), memcpy_retl_o2_plus_63_48) 244 EX_ST(STORE(stx, %o3, %o0+24), memcpy_retl_o2_plus_63_40) 246 EX_ST(STORE(stx, %o4, %o0+32), memcpy_retl_o2_plus_63_32) 249 EX_ST(STORE(stx, %o3, %o0+40), memcpy_retl_o2_plus_63_24) 252 EX_ST(STORE(stx, %o4, %o0-16), memcpy_retl_o2_plus_63_16) [all …]
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H A D | NG4memcpy.S | 69 #ifndef STORE 71 #define STORE(type,src,addr) type src, [addr] macro 73 #define STORE(type,src,addr) type##a src, [addr] %asi macro 135 EX_ST(STORE(stb, %g2, %o0 - 0x01), memcpy_retl_o2_plus_g1_plus_1) 165 EX_ST(STORE(stx, %g2, %o0 - 0x08), memcpy_retl_o2_plus_g1_plus_8) 241 EX_ST_FP(STORE(std, %f16, %o0 + 0x00), memcpy_retl_o2_plus_o4_plus_64) 242 EX_ST_FP(STORE(std, %f18, %o0 + 0x08), memcpy_retl_o2_plus_o4_plus_56) 243 EX_ST_FP(STORE(std, %f20, %o0 + 0x10), memcpy_retl_o2_plus_o4_plus_48) 244 EX_ST_FP(STORE(std, %f22, %o0 + 0x18), memcpy_retl_o2_plus_o4_plus_40) 245 EX_ST_FP(STORE(std, %f24, %o0 + 0x20), memcpy_retl_o2_plus_o4_plus_32) [all …]
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H A D | memset.S | 30 #define STORE(source, base, offset, n) \ macro 50 STORE(source, base, offset, 0x00); \ 51 STORE(source, base, offset, 0x08); \ 52 STORE(source, base, offset, 0x10); \ 53 STORE(source, base, offset, 0x18); \ 54 STORE(source, base, offset, 0x20); \ 55 STORE(source, base, offset, 0x28); \ 56 STORE(source, base, offset, 0x30); \ 57 STORE(source, base, offset, 0x38);
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H A D | U3memcpy.S | 44 #ifndef STORE 45 #define STORE(type,src,addr) type src, [addr] macro 216 EX_ST_FP(STORE(stb, %o3, %o1 + GLOBAL_SPARE), U3_retl_o2_plus_g2_plus_g1_plus_1) 232 EX_ST_FP(STORE(std, %f0, %o0), U3_retl_o2_plus_g2_plus_8) 240 EX_ST_FP(STORE(std, %f2, %o0), U3_retl_o2_plus_g2_plus_8) 354 EX_ST_FP(STORE(std, %f8, %o0), U3_retl_o2_plus_g2_plus_8) 361 EX_ST_FP(STORE(std, %f8, %o0), U3_retl_o2_plus_g2_plus_8) 382 EX_ST(STORE(stx, %o5, %o1 + %o3), U3_retl_o2) 390 EX_ST(STORE(stw, %o5, %o1 + %o3), U3_retl_o2) 398 EX_ST(STORE(sth, %o5, %o1 + %o3), U3_retl_o2) [all …]
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H A D | GENmemcpy.S | 26 #ifndef STORE 27 #define STORE(type,src,addr) type src, [addr] macro 98 EX_ST(STORE(stb, %g1, %o0),GEN_retl_o4_1) 107 EX_ST(STORE(stx, %g2, %o0),GEN_retl_g1_8) 125 EX_ST(STORE(stw, %g1, %o1 + %o3),GEN_retl_o2_4) 136 EX_ST(STORE(stb, %g1, %o1 + %o3),GEN_retl_o2_1)
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H A D | NGmemcpy.S | 51 #ifndef STORE 52 #define STORE(type,src,addr) type src, [addr] macro 213 EX_ST(STORE(stb, %g1, %o0), NG_ret_i2_plus_i4_plus_1) 412 EX_ST(STORE(stx, %o4, %i1 + %i3), NG_ret_i2_plus_i4) 414 EX_ST(STORE(stx, %g1, %i1 + %i3), NG_ret_i2_plus_i4_minus_8) 422 EX_ST(STORE(stx, %o4, %i1 + %i3), NG_ret_i2_plus_8) 429 EX_ST(STORE(stw, %i5, %i1 + %i3), NG_ret_i2_plus_4) 446 EX_ST(STORE(stb, %i5, %i1 + %i3), NG_ret_i2_plus_g1_plus_1) 471 EX_ST(STORE(stx, %i5, %o0), NG_ret_i2_and_7_plus_i4) 492 EX_ST(STORE(stw, %g1, %i1 + %i3), NG_ret_i2_plus_4) [all …]
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H A D | U1memcpy.S | 50 #ifndef STORE 51 #define STORE(type,src,addr) type src, [addr] macro 111 EX_ST_FP(STORE(std, %f48, %dest), U1_g3_8_fp); \ 285 EX_ST_FP(STORE(stb, %o3, %o1 + %GLOBAL_SPARE), U1_g1_1_fp) 301 EX_ST_FP(STORE(std, %f0, %o0), U1_g2_8_fp) 309 EX_ST_FP(STORE(std, %f0, %o0), U1_g2_8_fp) 554 EX_ST_FP(STORE(std, %f8, %o0), U1_g3_8_fp) 561 EX_ST_FP(STORE(std, %f8, %o0), U1_g3_8_fp) 571 EX_ST_FP(STORE(stb, %o3, %o0), U1_o2_1_fp) 590 EX_ST(STORE(stx, %o5, %o1 + %o3), U1_gs_10) [all …]
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H A D | NG2memcpy.S | 58 #ifndef STORE 60 #define STORE(type,src,addr) type src, [addr] macro 62 #define STORE(type,src,addr) type##a src, [addr] 0x80 macro 297 EX_ST(STORE(stb, %g1, %o0), NG2_retl_o2_plus_o4_plus_1) 497 EX_ST(STORE(stx, %o5, %o1 + GLOBAL_SPARE), NG2_retl_o2_plus_o4_plus_16) 499 EX_ST(STORE(stx, %g1, %o1 + GLOBAL_SPARE), NG2_retl_o2_plus_o4_plus_8) 507 EX_ST(STORE(stx, %o5, %o1 + GLOBAL_SPARE), NG2_retl_o2_plus_8) 514 EX_ST(STORE(stw, %o5, %o1 + GLOBAL_SPARE), NG2_retl_o2_plus_4) 531 EX_ST(STORE(stb, %o5, %o1 + GLOBAL_SPARE), NG2_retl_o2_plus_g1_plus_1) 556 EX_ST(STORE(stx, %o5, %o0), NG2_retl_o2_and_7_plus_o4_plus_8) [all …]
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H A D | csum_copy_to_user.S | 20 #define STORE(type,src,addr) type##a src, [addr] %asi macro
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H A D | GENcopy_to_user.S | 20 #define STORE(type,src,addr) type##a src, [addr] ASI_AIUS macro
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/openbmc/linux/arch/mips/cavium-octeon/ |
H A D | octeon-memcpy.S | 89 #define STORE sd macro 192 EXC( STORE t0, UNIT(0)(dst), s_exc_p16u) 193 EXC( STORE t1, UNIT(1)(dst), s_exc_p15u) 194 EXC( STORE t2, UNIT(2)(dst), s_exc_p14u) 195 EXC( STORE t3, UNIT(3)(dst), s_exc_p13u) 200 EXC( STORE t0, UNIT(4)(dst), s_exc_p12u) 201 EXC( STORE t1, UNIT(5)(dst), s_exc_p11u) 202 EXC( STORE t2, UNIT(6)(dst), s_exc_p10u) 204 EXC( STORE t3, UNIT(7)(dst), s_exc_p9u) 210 EXC( STORE t0, UNIT(-8)(dst), s_exc_p8u) [all …]
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/openbmc/linux/Documentation/translations/ko_KR/ |
H A D | memory-barriers.txt | 188 STORE A=3, STORE B=4, y=LOAD A->3, x=LOAD B->4 189 STORE A=3, STORE B=4, x=LOAD B->4, y=LOAD A->3 190 STORE A=3, y=LOAD A->3, STORE B=4, x=LOAD B->4 191 STORE A=3, y=LOAD A->3, x=LOAD B->2, STORE B=4 192 STORE A=3, x=LOAD B->2, STORE B=4, y=LOAD A->3 193 STORE A=3, x=LOAD B->2, y=LOAD A->3, STORE B=4 194 STORE B=4, STORE A=3, y=LOAD A->3, x=LOAD B->4 195 STORE B=4, ... 245 STORE *A = 5, x = LOAD *D 246 x = LOAD *D, STORE *A = 5 [all …]
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/openbmc/linux/arch/mips/lib/ |
H A D | memcpy.S | 154 #define STORE(reg, addr, handler) EXC(sd, ST_INSN, reg, addr, handler) macro 191 #define STORE(reg, addr, handler) EXC(sw, ST_INSN, reg, addr, handler) macro 332 STORE(t0, UNIT(0)(dst), .Ls_exc_p8u\@) 333 STORE(t1, UNIT(1)(dst), .Ls_exc_p7u\@) 338 STORE(t2, UNIT(-6)(dst), .Ls_exc_p6u\@) 339 STORE(t3, UNIT(-5)(dst), .Ls_exc_p5u\@) 340 STORE(t4, UNIT(-4)(dst), .Ls_exc_p4u\@) 341 STORE(t7, UNIT(-3)(dst), .Ls_exc_p3u\@) 342 STORE(t0, UNIT(-2)(dst), .Ls_exc_p2u\@) 343 STORE(t1, UNIT(-1)(dst), .Ls_exc_p1u\@) [all …]
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H A D | csum_partial.S | 379 #define STORE(reg, addr) EXC(sd, ST_INSN, reg, addr) macro 399 #define STORE(reg, addr) EXC(sw, ST_INSN, reg, addr) macro 482 STORE(t0, UNIT(0)(dst)) 484 STORE(t1, UNIT(1)(dst)) 486 STORE(t2, UNIT(2)(dst)) 488 STORE(t3, UNIT(3)(dst)) 490 STORE(t4, UNIT(4)(dst)) 492 STORE(t5, UNIT(5)(dst)) 494 STORE(t6, UNIT(6)(dst)) 496 STORE(t7, UNIT(7)(dst)) [all …]
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/openbmc/linux/arch/powerpc/lib/ |
H A D | xor_vmx.c | 36 #define STORE(V) \ macro 64 STORE(v1); in __xor_altivec_2() 87 STORE(v1); in __xor_altivec_3() 115 STORE(v1); in __xor_altivec_4() 148 STORE(v1); in __xor_altivec_5()
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/openbmc/linux/tools/testing/selftests/powerpc/mm/ |
H A D | stack_expansion_ldst.c | 33 STORE, enumerator 62 if (type == STORE) in consume_stack() 183 test_one_type(STORE, page_size, rlimit.rlim_cur); in test()
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/openbmc/linux/arch/arm64/net/ |
H A D | bpf_jit.h | 60 #define A64_STRB(Wt, Xn, Xm) A64_LS_REG(Wt, Xn, Xm, 8, STORE) 63 #define A64_STRH(Wt, Xn, Xm) A64_LS_REG(Wt, Xn, Xm, 16, STORE) 66 #define A64_STR32(Wt, Xn, Xm) A64_LS_REG(Wt, Xn, Xm, 32, STORE) 69 #define A64_STR64(Xt, Xn, Xm) A64_LS_REG(Xt, Xn, Xm, 64, STORE) 77 #define A64_STRBI(Wt, Xn, imm) A64_LS_IMM(Wt, Xn, imm, 8, STORE) 80 #define A64_STRHI(Wt, Xn, imm) A64_LS_IMM(Wt, Xn, imm, 16, STORE) 83 #define A64_STR32I(Wt, Xn, imm) A64_LS_IMM(Wt, Xn, imm, 32, STORE) 86 #define A64_STR64I(Xt, Xn, imm) A64_LS_IMM(Xt, Xn, imm, 64, STORE) 101 #define A64_PUSH(Rt, Rt2, Rn) A64_LS_PAIR(Rt, Rt2, Rn, -16, STORE, PRE_INDEX)
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/openbmc/linux/Documentation/ |
H A D | memory-barriers.txt | 159 STORE A=3, STORE B=4, y=LOAD A->3, x=LOAD B->4 160 STORE A=3, STORE B=4, x=LOAD B->4, y=LOAD A->3 161 STORE A=3, y=LOAD A->3, STORE B=4, x=LOAD B->4 162 STORE A=3, y=LOAD A->3, x=LOAD B->2, STORE B=4 163 STORE A=3, x=LOAD B->2, STORE B=4, y=LOAD A->3 164 STORE A=3, x=LOAD B->2, y=LOAD A->3, STORE B=4 165 STORE B=4, STORE A=3, y=LOAD A->3, x=LOAD B->4 166 STORE B=4, ... 217 STORE *A = 5, x = LOAD *D 218 x = LOAD *D, STORE *A = 5 [all …]
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/openbmc/linux/Documentation/translations/sp_SP/ |
H A D | memory-barriers.txt | 173 organizar en 24 combinaciones diferentes (donde LOAD es cargar y STORE es 176 STORE A=3, STORE B=4, y=LOAD A->3, x=LOAD B->4 177 STORE A=3, STORE B=4, x=LOAD B->4, y=LOAD A->3 178 STORE A=3, y=LOAD A->3, STORE B=4, x=LOAD B->4 179 STORE A=3, y=LOAD A->3, x=LOAD B->2, STORE B=4 180 STORE A=3, x=LOAD B->2, STORE B=4, y=LOAD A->3 181 STORE A=3, x=LOAD B->2, y=LOAD A->3, STORE B=4 182 STORE B=4, STORE A=3, y=LOAD A->3, x=LOAD B->4 183 STORE B=4, ... 232 STORE *A = 5, x = LOAD *D [all …]
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/openbmc/linux/arch/powerpc/include/asm/ |
H A D | sstep.h | 29 STORE, enumerator 53 #define OP_IS_STORE(type) ((STORE <= (type) && (type) <= STORE_VSX) || (type) == STCX)
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/openbmc/qemu/docs/devel/ |
H A D | atomics.rst | 125 components of the system, before all the LOAD or STORE operations 129 components of the system, after all the LOAD or STORE operations 145 before all the LOAD or STORE operations specified afterwards. 149 - ``qatomic_store_release()``, which guarantees the STORE to appear to 151 after all the LOAD or STORE operations specified before. 170 - ``smp_wmb()`` guarantees that all the STORE operations specified before 171 the barrier will appear to happen before all the STORE operations 179 the barrier will appear to happen before all the LOAD or STORE operations 183 - ``smp_mb_release()`` guarantees that all the STORE operations specified *after* 184 the barrier will appear to happen after all the LOAD or STORE operations [all …]
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/openbmc/qemu/target/s390x/tcg/ |
H A D | insn-data.h.inc | 280 /* COMPARE AND SWAP AND STORE */ 847 /* STORE */ 855 /* STORE RELATIVE LONG */ 858 /* STORE CHARACTER */ 861 /* STORE CHARACTER HIGH */ 863 /* STORE CHARACTERS UNDER MASK */ 867 /* STORE HALFWORD */ 870 /* STORE HALFWORD HIGH */ 872 /* STORE HALFWORD RELATIVE LONG */ 874 /* STORE HIGH */ [all …]
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/openbmc/linux/drivers/md/bcache/ |
H A D | sysfs.h | 19 #define STORE(fn) \ macro 34 STORE(fn) \
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