Searched refs:STM32H7_APB1L_RESET (Results 1 – 5 of 5) sorted by relevance
90 #define STM32H7_APB1L_RESET(bit) (STM32H7_RCC_APB1L_##bit + (0x90 * 8)) macro
92 #define STM32H7_APB1L_RESET(bit) (STM32H7_RCC_APB1L_##bit + (0x90 * 8)) macro
113 resets = <&rcc STM32H7_APB1L_RESET(SPI2)>;125 resets = <&rcc STM32H7_APB1L_RESET(SPI3)>;161 resets = <&rcc STM32H7_APB1L_RESET(I2C1)>;173 resets = <&rcc STM32H7_APB1L_RESET(I2C2)>;185 resets = <&rcc STM32H7_APB1L_RESET(I2C3)>;
70 resets = <&rcc STM32H7_APB1L_RESET(TIM2)>;
151 resets = <&rcc STM32H7_APB1L_RESET(TIM2)>;