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Searched refs:SRR1 (Results 1 – 13 of 13) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A Dstart.S79 mtspr SRR1, r3 /* Make SRR1 match MSR */
201 EXCEPTION_PROLOG(SRR0, SRR1)
212 EXCEPTION_PROLOG(SRR0, SRR1)
287 mtspr SRR1,r20
315 mtspr SRR1,r0
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dstart.S86 EXCEPTION_PROLOG(SRR0, SRR1)
97 EXCEPTION_PROLOG(SRR0, SRR1)
350 mtspr SRR1, r3
481 mtspr SRR1, r3
508 mtspr SRR1,r20
536 mtspr SRR1,r0
/openbmc/linux/arch/powerpc/kernel/
H A Dhead_32.h40 stw r11, SRR1(r10)
97 lwz r9, SRR1(r12)
H A Dentry_32.S490 RESTORE_xSRR(SRR0,SRR1);
497 RESTORE_xSRR(SRR0,SRR1);
505 RESTORE_xSRR(SRR0,SRR1);
H A Dhead_book3s_32.S319 stw r11, SRR1(r10)
704 lwz r9, SRR1(r10)
H A Dexceptions-64e.S96 SPECIAL_EXC_STORE(r10,SRR1)
171 SPECIAL_EXC_LOAD(r10,SRR1)
H A Dasm-offsets.c128 OFFSET(SRR1, thread_struct, srr1); in main()
/openbmc/u-boot/include/
H A Dppc_asm.tmpl194 * r21, r22 (SRR0), and r23 (SRR1).
226 EXCEPTION_PROLOG(SRR0, SRR1); \
265 EXCEPTION_PROLOG(SRR0, SRR1); \
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dstart.S115 mtspr SRR1, r3
331 EXCEPTION_PROLOG(SRR0, SRR1)
342 EXCEPTION_PROLOG(SRR0, SRR1)
447 mtspr SRR1,r20
475 mtspr SRR1,r0
501 mtspr SRR1, r3 /* Make SRR1 match MSR */
/openbmc/linux/Documentation/powerpc/
H A Dtransactional_memory.rst269 if (MSR 29:31 ¬ = 0b010 | SRR1 29:31 ¬ = 0b000) then
270 MSR 29:31 <- SRR1 29:31
H A Dultravisor.rst992 address of the instruction after the ``UV_ESM`` ultracall and ``SRR1``
1002 MSR values set to the value in ``SRR1``.
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dstart.S1261 EXCEPTION_PROLOG(SRR0, SRR1)
1272 EXCEPTION_PROLOG(SRR0, SRR1)
1340 mtspr SRR1,r0
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h676 #define SRR1 SPRN_SRR1 /* Save and Restore Register 1 */ macro