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Searched refs:SRDS_PLLCR0_RFCK_SEL_156_25 (Results 1 – 11 of 11) sorted by relevance

/openbmc/u-boot/board/freescale/corenet_ds/
H A Dcorenet_ds.c151 actual[i] = SRDS_PLLCR0_RFCK_SEL_156_25; in misc_init_r()
168 SRDS_PLLCR0_RFCK_SEL_156_25 : SRDS_PLLCR0_RFCK_SEL_125; in misc_init_r()
170 SRDS_PLLCR0_RFCK_SEL_156_25 : SRDS_PLLCR0_RFCK_SEL_125; in misc_init_r()
/openbmc/u-boot/board/freescale/p2041rdb/
H A Dp2041rdb.c170 {SRDS_PLLCR0_RFCK_SEL_100, SRDS_PLLCR0_RFCK_SEL_156_25, in misc_init_r()
/openbmc/u-boot/board/freescale/t1040qds/
H A Dt1040qds.c219 actual[i] = SRDS_PLLCR0_RFCK_SEL_156_25; in misc_init_r()
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c389 rfck_sel = SRDS_PLLCR0_RFCK_SEL_156_25; in p4080_erratum_serdes8()
876 case SRDS_PLLCR0_RFCK_SEL_156_25: in serdes_clock_to_string()
H A Dfsl_corenet2_serdes.c388 case SRDS_PLLCR0_RFCK_SEL_156_25: in serdes_clock_to_string()
/openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/
H A Dimmap_ls102xa.h327 #define SRDS_PLLCR0_RFCK_SEL_156_25 0x20000000 macro
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dfsl_lsch2_serdes.c92 case SRDS_PLLCR0_RFCK_SEL_156_25: in serdes_clock_to_string()
/openbmc/u-boot/board/freescale/t4qds/
H A Dt4240qds.c657 actual[i] = SRDS_PLLCR0_RFCK_SEL_156_25; in misc_init_r()
/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch2.h569 #define SRDS_PLLCR0_RFCK_SEL_156_25 0x20000000 macro
/openbmc/u-boot/board/freescale/b4860qds/
H A Db4860qds.c1135 ret = SRDS_PLLCR0_RFCK_SEL_156_25; in serdes_refclock()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h2546 #define SRDS_PLLCR0_RFCK_SEL_156_25 0x20000000 macro
2630 #define SRDS_PLLCR0_RFCK_SEL_156_25 0x20000000 macro