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Searched refs:SRDS_PLLCR0_RFCK_SEL_122_88 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/
H A Dimmap_ls102xa.h330 #define SRDS_PLLCR0_RFCK_SEL_122_88 0x50000000 macro
/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch2.h572 #define SRDS_PLLCR0_RFCK_SEL_122_88 0x50000000 macro
/openbmc/u-boot/board/freescale/b4860qds/
H A Db4860qds.c1143 ret = SRDS_PLLCR0_RFCK_SEL_122_88; in serdes_refclock()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h2549 #define SRDS_PLLCR0_RFCK_SEL_122_88 0x50000000 macro