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Searched refs:SRDS1_MAX_LANES (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dp1023_serdes.c13 #define SRDS1_MAX_LANES 4 macro
17 static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
52 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dc29x_serdes.c12 #define SRDS1_MAX_LANES 4 macro
18 u8 lanes[SRDS1_MAX_LANES];
63 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dmpc8548_serdes.c12 #define SRDS1_MAX_LANES 8 macro
16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
50 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dmpc8568_serdes.c12 #define SRDS1_MAX_LANES 8 macro
16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
50 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dp2020_serdes.c12 #define SRDS1_MAX_LANES 4 macro
16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
58 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dmpc8569_serdes.c12 #define SRDS1_MAX_LANES 4 macro
16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
59 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dp1010_serdes.c13 #define SRDS1_MAX_LANES 4 macro
18 static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
69 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dmpc8572_serdes.c12 #define SRDS1_MAX_LANES 8 macro
16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
54 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dp1021_serdes.c30 #define SRDS1_MAX_LANES 4 macro
34 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
70 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dmpc8544_serdes.c12 #define SRDS1_MAX_LANES 8 macro
17 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
70 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dp1022_serdes.c13 #define SRDS1_MAX_LANES 4 macro
18 static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
108 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dbsc9132_serdes.c13 #define SRDS1_MAX_LANES 4 macro
17 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
94 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dmpc8536_serdes.c52 #define SRDS1_MAX_LANES 8 macro
57 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
230 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dmpc8610_serdes.c12 #define SRDS1_MAX_LANES 4 macro
17 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
66 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
H A Dmpc8641_serdes.c12 #define SRDS1_MAX_LANES 4 macro
17 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
75 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()