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Searched refs:SPRN_ICCR (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/powerpc/mm/nohash/
H A D40x.c81 mtspr(SPRN_ICCR, 0xFFFF0000); /* 2GByte of instr. space at 0x0. */ in MMU_init_hw()
/openbmc/linux/arch/powerpc/include/asm/
H A Dreg_booke.h181 #define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */ macro
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h286 #define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */ macro