| /openbmc/qemu/target/hexagon/idef-parser/ |
| H A D | macros.h.inc | 41 #define fBIDIR_ASHIFTL(SRC, SHAMT, REGSTYPE) \
42 ((SHAMT > 0) ? \
43 (fCAST##REGSTYPE##s(SRC) << SHAMT) : \
44 (fCAST##REGSTYPE##s(SRC) >> -SHAMT))
46 #define fBIDIR_LSHIFTL(SRC, SHAMT, REGSTYPE) \
47 ((SHAMT > 0) ? \
48 (fCAST##REGSTYPE##u(SRC) << SHAMT) : \
49 (fCAST##REGSTYPE##u(SRC) >>> -SHAMT))
51 #define fBIDIR_ASHIFTR(SRC, SHAMT, REGSTYPE) \
52 ((SHAMT > 0) ? \
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| /openbmc/qemu/target/hexagon/ |
| H A D | macros.h | 482 #define fBIDIR_SHIFTL(SRC, SHAMT, REGSTYPE) \ argument
483 (((SHAMT) < 0) ? ((fCAST##REGSTYPE(SRC) >> ((-(SHAMT)) - 1)) >> 1) \
484 : (fCAST##REGSTYPE(SRC) << (SHAMT)))
485 #define fBIDIR_ASHIFTL(SRC, SHAMT, REGSTYPE) \ argument
486 fBIDIR_SHIFTL(SRC, SHAMT, REGSTYPE##s)
487 #define fBIDIR_LSHIFTL(SRC, SHAMT, REGSTYPE) \ argument
488 fBIDIR_SHIFTL(SRC, SHAMT, REGSTYPE##u)
489 #define fBIDIR_ASHIFTL_SAT(SRC, SHAMT, REGSTYPE) \ argument
490 (((SHAMT) < 0) ? ((fCAST##REGSTYPE##s(SRC) >> ((-(SHAMT)) - 1)) >> 1) \
491 : fSAT_ORIG_SHL(fCAST##REGSTYPE##s(SRC) << (SHAMT), (SRC)))
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| /openbmc/qemu/target/hexagon/imported/ |
| H A D | macros.def | 988 …(((SHAMT) < 0) ? ((fCAST##REGSTYPE(SRC) >> ((-(SHAMT))-1)) >>1) : (fCAST##REGSTYPE(SRC) << (SHAMT)…
994 fBIDIR_SHIFTL(SRC,SHAMT,REGSTYPE##s),
1000 fBIDIR_SHIFTL(SRC,SHAMT,REGSTYPE##u),
1006 …(((SHAMT) < 0) ? ((fCAST##REGSTYPE##s(SRC) >> ((-(SHAMT))-1)) >>1) : fSAT_ORIG_SHL(fCAST##REGSTYPE…
1013 …(((SHAMT) < 0) ? ((fCAST##REGSTYPE(SRC) << ((-(SHAMT))-1)) << 1) : (fCAST##REGSTYPE(SRC) >> (SHAMT…
1019 fBIDIR_SHIFTR(SRC,SHAMT,REGSTYPE##s),
1025 fBIDIR_SHIFTR(SRC,SHAMT,REGSTYPE##u),
1031 …(((SHAMT) < 0) ? fSAT_ORIG_SHL((fCAST##REGSTYPE##s(SRC) << ((-(SHAMT))-1)) << 1,(SRC)) : (fCAST##R…
1037 (fCAST##REGSTYPE##s(SRC) >> (SHAMT)),
1043 (((SHAMT) >= 64)?0:(fCAST##REGSTYPE##u(SRC) >> (SHAMT))),
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| /openbmc/qemu/target/riscv/insn_trans/ |
| H A D | trans_rvb.c.inc | 336 #define GEN_SHADD(SHAMT) \
337 static void gen_sh##SHAMT##add(TCGv ret, TCGv arg1, TCGv arg2) \
341 tcg_gen_shli_tl(t, arg1, SHAMT); \
349 #define GEN_TRANS_SHADD(SHAMT) \
350 static bool trans_sh##SHAMT##add(DisasContext *ctx, arg_sh##SHAMT##add *a) \
353 return gen_arith(ctx, a, EXT_NONE, gen_sh##SHAMT##add, NULL); \
421 #define GEN_SHADD_UW(SHAMT) \
422 static void gen_sh##SHAMT##add_uw(TCGv ret, TCGv arg1, TCGv arg2) \
428 tcg_gen_shli_tl(t, t, SHAMT); \
436 #define GEN_TRANS_SHADD_UW(SHAMT) \
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| H A D | trans_xthead.c.inc | 114 #define GEN_TH_ADDSL(SHAMT) \
115 static void gen_th_addsl##SHAMT(TCGv ret, TCGv arg1, TCGv arg2) \
118 tcg_gen_shli_tl(t, arg2, SHAMT); \
126 #define GEN_TRANS_TH_ADDSL(SHAMT) \
127 static bool trans_th_addsl##SHAMT(DisasContext *ctx, \
128 arg_th_addsl##SHAMT * a) \
131 return gen_arith(ctx, a, EXT_NONE, gen_th_addsl##SHAMT, NULL); \
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| /openbmc/qemu/tests/tcg/hexagon/ |
| H A D | v69_hvx.c | 28 #define fVROUND(VAL, SHAMT) \ argument
29 ((VAL) + (((SHAMT) > 0) ? (1LL << ((SHAMT) - 1)) : 0))
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| /openbmc/qemu/target/hexagon/mmvec/ |
| H A D | macros.h | 339 #define fVNOROUND(VAL, SHAMT) VAL argument
341 #define fVROUND(VAL, SHAMT) \ argument
342 ((VAL) + (((SHAMT) > 0) ? (1LL << ((SHAMT) - 1)) : 0))
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| /openbmc/qemu/target/hexagon/imported/mmvec/ |
| H A D | macros.def | 825 ((VAL) + (((SHAMT)>0)?(1LL<<((SHAMT)-1)):0)),
|