Home
last modified time | relevance | path

Searched refs:SDR_PHYGRP_RWMGRGRP_ADDRESS (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/altera/
H A Dsequencer.c14 (SDR_PHYGRP_RWMGRGRP_ADDRESS | 0x800);
17 (SDR_PHYGRP_RWMGRGRP_ADDRESS | 0xC00);
830 SDR_PHYGRP_RWMGRGRP_ADDRESS | in delay_for_n_mem_clocks()
848 u32 grpaddr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_init_load_regs()
879 u32 grpaddr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_load_user()
1130 writel(0, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_write_test_issue()
1239 const u32 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test_patterns()
1274 writel(0, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test_patterns()
1423 writel(0, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test()
1427 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test()
[all …]
H A Dsequencer.h85 #define SDR_PHYGRP_RWMGRGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x2000) macro