Lines Matching refs:SDR_PHYGRP_RWMGRGRP_ADDRESS
14 (SDR_PHYGRP_RWMGRGRP_ADDRESS | 0x800);
17 (SDR_PHYGRP_RWMGRGRP_ADDRESS | 0xC00);
246 writel(cs_and_odt_mask, SDR_PHYGRP_RWMGRGRP_ADDRESS | in set_rank_and_odt_mask()
813 writel(rwcfg->idle_loop1, SDR_PHYGRP_RWMGRGRP_ADDRESS | in delay_for_n_mem_clocks()
830 SDR_PHYGRP_RWMGRGRP_ADDRESS | in delay_for_n_mem_clocks()
848 u32 grpaddr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_init_load_regs()
879 u32 grpaddr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_load_user()
941 writel(RW_MGR_RANK_ALL, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_initialize()
1130 writel(0, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_write_test_issue()
1154 writel(mcc_instruction, (SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_write_test_issue()
1202 base_rw_mgr = readl(SDR_PHYGRP_RWMGRGRP_ADDRESS); in rw_mgr_mem_calibrate_write_test()
1239 const u32 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test_patterns()
1274 writel(0, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test_patterns()
1279 base_rw_mgr = readl(SDR_PHYGRP_RWMGRGRP_ADDRESS); in rw_mgr_mem_calibrate_read_test_patterns()
1344 writel(rwcfg->guaranteed_write, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_load_patterns()
1423 writel(0, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test()
1427 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test()
1430 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test()
1439 base_rw_mgr = readl(SDR_PHYGRP_RWMGRGRP_ADDRESS); in rw_mgr_mem_calibrate_read_test()
1448 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_RUN_SINGLE_GROUP_OFFSET; in rw_mgr_mem_calibrate_read_test()
3148 writel(rwcfg->precharge_all, SDR_PHYGRP_RWMGRGRP_ADDRESS | in mem_precharge_and_activate()
3160 writel(rwcfg->activate_0_and_1, SDR_PHYGRP_RWMGRGRP_ADDRESS | in mem_precharge_and_activate()
3587 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_INST_ROM_WRITE_OFFSET; in hc_initialize_rom_data()
3592 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_AC_ROM_WRITE_OFFSET; in hc_initialize_rom_data()