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Searched refs:SDP_3430_SDRC_RFR_CTRL_200MHz (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/board/overo/
H A Dspl.c39 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; in get_board_mem_timings()
45 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; in get_board_mem_timings()
51 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; in get_board_mem_timings()
/openbmc/u-boot/board/isee/igep00x0/
H A Dspl.c36 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; in get_board_mem_timings()
48 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; in get_board_mem_timings()
/openbmc/u-boot/board/lg/sniper/
H A Dsniper.c72 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; in get_board_mem_timings()
/openbmc/u-boot/board/ti/beagle/
H A Dbeagle.c178 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; in get_board_mem_timings()
188 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; in get_board_mem_timings()
/openbmc/u-boot/board/logicpd/omap3som/
H A Domap3logic.c85 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; in get_board_mem_timings()
/openbmc/u-boot/arch/arm/include/asm/arch-omap3/
H A Dmem.h43 #define SDP_3430_SDRC_RFR_CTRL_200MHz 0x0005e601 /* 7.8us/5ns - 50=0x5e6 */ macro