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Searched refs:SDMA1_BASE (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Daldebaran_reg_init.c44 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); in aldebaran_reg_base_init()
H A Darct_reg_init.c45 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); in arct_reg_base_init()
H A Dvega10_reg_init.c48 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); in vega10_reg_base_init()
H A Dvega20_reg_init.c47 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); in vega20_reg_base_init()
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega20_ip_offset.h117 static const struct IP_BASE SDMA1_BASE ={ { { { 0x00001860, 0, 0, 0, 0, 0 } }, variable
H A Dsienna_cichlid_ip_offset.h158 static const struct IP_BASE SDMA1_BASE = { { { { 0x00001260, 0x0000A000, 0x0001C000, 0x02402C00, 0 … variable
H A Dvega10_ip_offset.h173 static const struct IP_BASE __maybe_unused SDMA1_BASE = { { { { 0x00001460, 0, 0, 0, 0 } }, variable
H A Darct_ip_offset.h143 static const struct IP_BASE SDMA1_BASE ={ { { { 0x00001860, 0x00012560, 0x0040AC00, 0, 0… variable
H A Daldebaran_ip_offset.h175 static const struct IP_BASE SDMA1_BASE = { { { { 0x00001860, 0x00012560, 0x0040AC00, 0, 0, 0 } }, variable