Home
last modified time | relevance | path

Searched refs:SD0 (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun7i-a20-bananapi.dts229 "SD0-D1", "SD0-D0", "SD0-CLK", "SD0-CMD", "SD0-D3",
230 "SD0-D2", "", "",
241 "", "", "SD0-DET", "", "", "", "", "",
/openbmc/u-boot/arch/arm/dts/
H A Dsun7i-a20-bananapi.dts233 "SD0-D1", "SD0-D0", "SD0-CLK", "SD0-CMD", "SD0-D3",
234 "SD0-D2", "", "",
245 "", "", "SD0-DET", "", "", "", "", "",
H A Dzynqmp-zcu100-revC.dts250 /* SD0 only supports 3.3V, no level shifter */
/openbmc/linux/drivers/regulator/
H A Dmax77620-regulator.c727 RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0),
744 RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0),
762 RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 3387500, 12500, 0xFF, NONE),
/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dsil,sii9022.yaml66 on. There are 4 FIFOs and 4 I2S pins (SD0 - SD3). Any I2S pin can be
69 default value is <0>, describing SD0 pin being routed to HDMI audio
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dregulator-max77620.txt18 in-sd0-supply: Input supply for SD0, INA-SD0 or INB-SD0 pins.
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Drenesas,drif.yaml20 | |-----SD0------->|D0 |
164 # | |-----SD0------->|D0 |
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Drzg2lc-smarc-som.dtsi169 * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2]
H A Drzg2l-smarc-som.dtsi240 * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2]
/openbmc/linux/drivers/scsi/
H A Dnsp32.h239 # define SD0 BIT(0) macro
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-clearfog-gtr.dtsi31 21,28,37,38,39,40 - SD0
/openbmc/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-zcu100-revC.dts494 /* SD0 only supports 3.3V, no level shifter */
/openbmc/linux/arch/powerpc/boot/dts/
H A Dakebono.dts136 SD0: sd@30000000000 { label
/openbmc/qemu/hw/misc/
H A Dxlnx-versal-pmc-iou-slcr.c532 FIELD(SD0_IOU_INTERCONNECT_ROUTE, SD0, 0, 1)