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Searched refs:SC_RSTCTRL4 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/clk/
H A Dclk-dram-pro5.c21 tmp = readl(SC_RSTCTRL4); in uniphier_pro5_dram_clk_init()
25 writel(tmp, SC_RSTCTRL4); in uniphier_pro5_dram_clk_init()
26 readl(SC_RSTCTRL4); /* dummy read */ in uniphier_pro5_dram_clk_init()
H A Dclk-dram-pxs2.c18 tmp = readl(SC_RSTCTRL4); in uniphier_pxs2_dram_clk_init()
23 writel(tmp, SC_RSTCTRL4); in uniphier_pxs2_dram_clk_init()
24 readl(SC_RSTCTRL4); /* dummy read */ in uniphier_pxs2_dram_clk_init()
/openbmc/u-boot/arch/arm/mach-uniphier/
H A Dsc64-regs.h16 #define SC_RSTCTRL4 (SC_BASE_ADDR | 0x200c) macro
H A Dsc-regs.h58 #define SC_RSTCTRL4 (SC_BASE_ADDR | 0x200c) macro