1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 278c627cfSMasahiro Yamada /* 378c627cfSMasahiro Yamada * Copyright (C) 2015-2017 Socionext Inc. 478c627cfSMasahiro Yamada */ 578c627cfSMasahiro Yamada 678c627cfSMasahiro Yamada #include <linux/io.h> 778c627cfSMasahiro Yamada 878c627cfSMasahiro Yamada #include "../init.h" 978c627cfSMasahiro Yamada #include "../sc-regs.h" 1078c627cfSMasahiro Yamada uniphier_pro5_dram_clk_init(void)1178c627cfSMasahiro Yamadavoid uniphier_pro5_dram_clk_init(void) 1278c627cfSMasahiro Yamada { 1378c627cfSMasahiro Yamada u32 tmp; 1478c627cfSMasahiro Yamada 1578c627cfSMasahiro Yamada /* 1678c627cfSMasahiro Yamada * deassert reset 1778c627cfSMasahiro Yamada * UMCA2: Ch1 (DDR3) 1878c627cfSMasahiro Yamada * UMCA1, UMC31: Ch0 (WIO1) 1978c627cfSMasahiro Yamada * UMCA0, UMC30: Ch0 (WIO0) 2078c627cfSMasahiro Yamada */ 2178c627cfSMasahiro Yamada tmp = readl(SC_RSTCTRL4); 2278c627cfSMasahiro Yamada tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 | 2378c627cfSMasahiro Yamada SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 | 2478c627cfSMasahiro Yamada SC_RSTCTRL4_NRST_UMC31 | SC_RSTCTRL4_NRST_UMC30; 2578c627cfSMasahiro Yamada writel(tmp, SC_RSTCTRL4); 2678c627cfSMasahiro Yamada readl(SC_RSTCTRL4); /* dummy read */ 2778c627cfSMasahiro Yamada 2878c627cfSMasahiro Yamada /* provide clocks */ 2978c627cfSMasahiro Yamada tmp = readl(SC_CLKCTRL4); 3078c627cfSMasahiro Yamada tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC1 | 3178c627cfSMasahiro Yamada SC_CLKCTRL4_CEN_UMC0; 3278c627cfSMasahiro Yamada writel(tmp, SC_CLKCTRL4); 3378c627cfSMasahiro Yamada readl(SC_CLKCTRL4); /* dummy read */ 3478c627cfSMasahiro Yamada } 35