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Searched refs:SCL_ODTCSWW (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/microchip/
H A Dddr2_regs.h132 #define SCL_ODTCSWW BIT(24) macro
H A Dddr2.c39 SCL_ODTCSWW, &ddr2_phy->scl_config_1); in ddr2_phy_init()