Home
last modified time | relevance | path

Searched refs:SCLK_PDM (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Drockchip,pdm.yaml106 clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
/openbmc/linux/include/dt-bindings/clock/
H A Dpx30-cru.h17 #define SCLK_PDM 15 macro
H A Drk3308-cru.h79 #define SCLK_PDM 75 macro
H A Drk3328-cru.h50 #define SCLK_PDM 61 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3328-cru.h49 #define SCLK_PDM 61 macro
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3328.c615 case SCLK_PDM: in rk3328_clk_set_rate()
736 case SCLK_PDM: in rk3328_clk_set_parent()
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3328.c474 …COMPOSITE(SCLK_PDM, "clk_pdm", mux_cpll_gpll_apll_p, CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PAREN…
H A Dclk-px30.c596 GATE(SCLK_PDM, "clk_pdm", "clk_pdm_mux", CLK_SET_RATE_PARENT,
H A Dclk-rk3308.c638 GATE(SCLK_PDM, "clk_pdm", "clk_pdm_mux", 0,
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi266 clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
800 <&cru DCLK_LCDC>, <&cru SCLK_PDM>,
/openbmc/u-boot/arch/arm/dts/
H A Drk3328.dtsi367 <&cru DCLK_LCDC>, <&cru SCLK_PDM>,