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Searched refs:SCLK_BUS1_PLL_A (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dexynos7-clk.h25 #define SCLK_BUS1_PLL_A 15 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dexynos7420-clk.h28 #define SCLK_BUS1_PLL_A 15 macro
/openbmc/u-boot/drivers/clk/exynos/
H A Dclk-exynos7420.c77 case SCLK_BUS1_PLL_A: in exynos7420_topc_get_rate()
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos7.c161 GATE(SCLK_BUS1_PLL_A, "sclk_bus1_pll_a", "dout_sclk_bus1_pll",