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Searched refs:SCLK_BUS0_PLL_A (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dexynos7-clk.h27 #define SCLK_BUS0_PLL_A 17 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dexynos7420-clk.h30 #define SCLK_BUS0_PLL_A 17 macro
/openbmc/u-boot/drivers/clk/exynos/
H A Dclk-exynos7420.c73 case SCLK_BUS0_PLL_A: in exynos7420_topc_get_rate()
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos7.c165 GATE(SCLK_BUS0_PLL_A, "sclk_bus0_pll_a", "dout_sclk_bus0_pll",