/openbmc/linux/arch/arm64/net/ |
H A D | bpf_jit.h | 51 #define A64_BR(Rn) aarch64_insn_gen_branch_reg(Rn, AARCH64_INSN_BRANCH_NOLINK) argument 52 #define A64_BLR(Rn) aarch64_insn_gen_branch_reg(Rn, AARCH64_INSN_BRANCH_LINK) argument 53 #define A64_RET(Rn) aarch64_insn_gen_branch_reg(Rn, AARCH64_INSN_BRANCH_RETURN) argument 56 #define A64_LS_REG(Rt, Rn, Rm, size, type) \ argument 57 aarch64_insn_gen_load_store_reg(Rt, Rn, Rm, \ 73 #define A64_LS_IMM(Rt, Rn, imm, size, type) \ argument 74 aarch64_insn_gen_load_store_imm(Rt, Rn, imm, \ 96 #define A64_LS_PAIR(Rt, Rt2, Rn, offset, ls, type) \ argument 97 aarch64_insn_gen_load_store_pair(Rt, Rt2, Rn, offset, \ 101 #define A64_PUSH(Rt, Rt2, Rn) A64_LS_PAIR(Rt, Rt2, Rn, -16, STORE, PRE_INDEX) argument [all …]
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/openbmc/linux/arch/sh/math-emu/ |
H A D | math.c | 51 #define Rn (regs->regs[n]) macro 210 MWRITE(FRm, Rn + R0 + 4); in fmov_reg_idx() 212 MWRITE(FRm, Rn + R0); in fmov_reg_idx() 214 MWRITE(FRm, Rn + R0); in fmov_reg_idx() 226 MWRITE(FRm, Rn + 4); in fmov_reg_mem() 228 MWRITE(FRm, Rn); in fmov_reg_mem() 230 MWRITE(FRm, Rn); in fmov_reg_mem() 242 Rn -= 8; in fmov_reg_dec() 243 MWRITE(FRm, Rn + 4); in fmov_reg_dec() 245 MWRITE(FRm, Rn); in fmov_reg_dec() [all …]
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/openbmc/linux/Documentation/arch/arm/nwfpe/ |
H A D | netwinder-fpe.rst | 24 <LDF|STF>{cond}<S|D|E> Fd, Rn 25 <LDF|STF>{cond}<S|D|E> Fd, [Rn, #<expression>]{!} 26 <LDF|STF>{cond}<S|D|E> Fd, [Rn], #<expression> 33 <LFM|SFM>{cond}<S|D|E> Fd, <count>, [Rn] 34 <LFM|SFM>{cond}<S|D|E> Fd, <count>, [Rn, #<expression>]{!} 35 <LFM|SFM>{cond}<S|D|E> Fd, <count>, [Rn], #<expression> 38 <LFM|SFM>{cond}<FD,EA> Fd, <count>, [Rn]{!}
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/openbmc/linux/arch/arm64/kernel/ |
H A D | compat_alignment.c | 192 u32 Rn = (tinstr & (7<<8)) >> 8; in thumb2arm() local 193 u32 W = ((L<<Rn) & (tinstr&255)) ? 0 : 1<<21; in thumb2arm() 195 return 0xe8800000 | W | (L<<20) | (Rn<<16) | in thumb2arm()
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/openbmc/linux/Documentation/arch/arm/ |
H A D | vlocks.rst | 133 LDR Rt, [Rn] 138 LDRB Rt, [Rn] 140 LDRBEQ Rt, [Rn, #1] 142 LDRBEQ Rt, [Rn, #2] 144 LDRBEQ Rt, [Rn, #3]
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/openbmc/linux/arch/arm/kernel/ |
H A D | phys2virt.S | 163 @ ADD | cond | 0 0 1 0 1 0 0 0 | Rn | Rd | imm12 | 164 @ SUB | cond | 0 0 1 0 0 1 0 0 | Rn | Rd | imm12 | 165 @ MOV | cond | 0 0 1 1 1 0 1 0 | Rn | Rd | imm12 | 166 @ MVN | cond | 0 0 1 1 1 1 1 0 | Rn | Rd | imm12 |
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/openbmc/qemu/target/sh4/ |
H A D | translate.c | 707 TCGv Rn = REG(B11_8); in _decode_opc() local 714 tcg_gen_add_i32(result, Rm, Rn); in _decode_opc() 716 tcg_gen_xor_i32(t1, result, Rn); in _decode_opc() 717 tcg_gen_xor_i32(t2, Rm, Rn); in _decode_opc() 720 tcg_gen_mov_i32(Rn, result); in _decode_opc() 935 TCGv Rn = REG(B11_8); in _decode_opc() local 942 tcg_gen_sub_i32(result, Rn, Rm); in _decode_opc() 944 tcg_gen_xor_i32(t1, result, Rn); in _decode_opc() 945 tcg_gen_xor_i32(t2, Rn, Rm); in _decode_opc() 948 tcg_gen_mov_i32(Rn, result); in _decode_opc()
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/openbmc/linux/arch/arm/mm/ |
H A D | alignment.c | 677 u32 Rn = (tinstr & (7<<8)) >> 8; in thumb2arm() local 678 u32 W = ((L<<Rn) & (tinstr&255)) ? 0 : 1<<21; in thumb2arm() 680 return 0xe8800000 | W | (L<<20) | (Rn<<16) | in thumb2arm()
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/openbmc/linux/arch/arm64/lib/ |
H A D | insn.c | 1413 enum aarch64_insn_register Rn, in aarch64_insn_gen_logical_immediate() argument 1438 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, Rn); in aarch64_insn_gen_logical_immediate() 1444 enum aarch64_insn_register Rn, in aarch64_insn_gen_extr() argument 1470 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, Rn); in aarch64_insn_gen_extr()
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/openbmc/linux/arch/arm/nwfpe/ |
H A D | fpmodule.inl | 28 for this in this routine. LDF/STF instructions with Rn = PC
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/openbmc/linux/arch/m68k/ifpsp060/ |
H A D | ilsp.doc | 117 # cmp2.l <ea>,Rn 121 mov.l %d0,-(%sp) # pass Rn
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/openbmc/linux/arch/arm64/include/asm/ |
H A D | insn.h | 647 enum aarch64_insn_register Rn, 652 enum aarch64_insn_register Rn,
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/openbmc/qemu/target/arm/tcg/ |
H A D | mve.decode | 61 # Note that both Rn and Qd are 3 bits only (no D bit) 403 # Rn bits [3:1] from insn, bit 0 is 0
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H A D | t32.decode | 681 # Rn=15 UNDEFs for LDM; M-profile CLRM uses that encoding
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/openbmc/linux/Documentation/input/devices/ |
H A D | atarikbd.rst | 542 On initial closure, a keystroke pair (make/break) is generated. Then up to Rn 544 seconds. After the Rn breakpoint is reached, keystroke pairs are generated
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