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Searched refs:RL_PH_SEL_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_regs.h408 #define RL_PH_SEL_MASK 0x7 macro
H A Dddr3_training_leveling.c1760 ((rl_phase_val & RL_PH_SEL_MASK) << RL_PH_SEL_OFFS); in mv_ddr_rl_dqs_burst()
1941 ((rl_phase_val & RL_PH_SEL_MASK) << RL_PH_SEL_OFFS); in mv_ddr_rl_dqs_burst()