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Searched refs:RESET_VECTOR_OFFSET (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Du-boot-nand_spl.lds51 #define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */ macro
53 #define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */ macro
57 .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
68 ASSERT(__init_end <= (0xfff00000 + RESET_VECTOR_OFFSET), "NAND bootstrap too big");
H A Du-boot-spl.lds85 #ifndef RESET_VECTOR_OFFSET
86 #define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */ macro
89 #define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */ macro
93 .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
/openbmc/u-boot/include/configs/
H A DT4240QDS.h27 #define RESET_VECTOR_OFFSET 0x27FFC macro
H A DB4860QDS.h23 #define RESET_VECTOR_OFFSET 0x27FFC macro
H A DT208xRDB.h36 #define RESET_VECTOR_OFFSET 0x27FFC macro
H A DT4240RDB.h27 #define RESET_VECTOR_OFFSET 0x27FFC macro
H A DT102xQDS.h35 #define RESET_VECTOR_OFFSET 0x27FFC macro
H A DT104xRDB.h32 #define RESET_VECTOR_OFFSET 0x27FFC macro
H A DT208xQDS.h42 #define RESET_VECTOR_OFFSET 0x27FFC macro
H A DT102xRDB.h38 #define RESET_VECTOR_OFFSET 0x27FFC macro