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Searched refs:REG_TX_IQK (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/net/wireless/realtek/rtl8xxxu/
H A Drtl8xxxu_8192e.c786 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8192eu_rx_iqk_path_a()
825 rtl8xxxu_write32(priv, REG_TX_IQK, val32); in rtl8192eu_rx_iqk_path_a()
962 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8192eu_rx_iqk_path_b()
1004 rtl8xxxu_write32(priv, REG_TX_IQK, val32); in rtl8192eu_rx_iqk_path_b()
1135 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8192eu_phy_iqcalibrate()
1182 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8192eu_phy_iqcalibrate()
H A Drtl8xxxu_8192f.c853 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8192fu_iqk_path_a()
934 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8192fu_rx_iqk_path_a()
972 rtl8xxxu_write32(priv, REG_TX_IQK, val32); in rtl8192fu_rx_iqk_path_a()
1078 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8192fu_iqk_path_b()
1202 rtl8xxxu_write32(priv, REG_TX_IQK, val32); in rtl8192fu_rx_iqk_path_b()
H A Drtl8xxxu_8723b.c618 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8723bu_iqk_path_a()
728 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8723bu_rx_iqk_path_a()
809 rtl8xxxu_write32(priv, REG_TX_IQK, val32); in rtl8723bu_rx_iqk_path_a()
H A Drtl8xxxu_8710b.c1140 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8710bu_rx_iqk_path_a()
1181 rtl8xxxu_write32(priv, REG_TX_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1350 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8710bu_phy_iqcalibrate()
H A Drtl8xxxu_8188f.c959 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8188fu_rx_iqk_path_a()
1001 rtl8xxxu_write32(priv, REG_TX_IQK, val32); in rtl8188fu_rx_iqk_path_a()
1148 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8188fu_phy_iqcalibrate()
H A Drtl8xxxu_8188e.c682 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8188eu_rx_iqk_path_a()
715 rtl8xxxu_write32(priv, REG_TX_IQK, val32); in rtl8188eu_rx_iqk_path_a()
853 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8188eu_phy_iqcalibrate()
H A Drtl8xxxu_regs.h1137 #define REG_TX_IQK 0x0e40 macro
H A Drtl8xxxu_core.c3288 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8xxxu_phy_iqcalibrate()