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Searched refs:REG_FPGA0_POWER_SAVE (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/net/wireless/realtek/rtl8xxxu/
H A Drtl8xxxu_8188e.c510 val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE); in rtl8188eu_config_channel()
516 rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32); in rtl8188eu_config_channel()
H A Drtl8xxxu_core.c968 val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE); in rtl8xxxu_write_rfreg()
970 rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32); in rtl8xxxu_write_rfreg()
983 val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE); in rtl8xxxu_write_rfreg()
985 rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32); in rtl8xxxu_write_rfreg()
1330 val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE); in rtl8xxxu_gen1_config_channel()
1336 rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32); in rtl8xxxu_gen1_config_channel()
1447 val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE); in rtl8xxxu_gen2_config_channel()
1453 rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32); in rtl8xxxu_gen2_config_channel()
H A Drtl8xxxu_regs.h883 #define REG_FPGA0_POWER_SAVE 0x0818 macro