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Searched refs:REG8 (Results 1 – 10 of 10) sorted by relevance

/openbmc/qemu/hw/intc/
H A Drx_icu.c35 REG8(IR, 0)
37 REG8(DTCER, 0x100)
39 REG8(IER, 0x200)
40 REG8(SWINTR, 0x2e0)
45 REG8(IPR, 0x300)
47 REG8(DMRSR, 0x400)
48 REG8(IRQCR, 0x500)
50 REG8(NMISR, 0x580)
54 REG8(NMIER, 0x581)
58 REG8(NMICLR, 0x582)
[all …]
/openbmc/qemu/hw/char/
H A Drenesas_sci.c34 REG8(SMR, 0)
42 REG8(BRR, 1)
43 REG8(SCR, 2)
51 REG8(TDR, 3)
52 REG8(SSR, 4)
62 REG8(RDR, 5)
63 REG8(SCMR, 6)
68 REG8(SEMR, 7)
/openbmc/qemu/hw/timer/
H A Drenesas_tmr.c32 REG8(TCR, 0)
37 REG8(TCSR, 2)
41 REG8(TCORA, 4)
42 REG8(TCORB, 6)
43 REG8(TCNT, 8)
44 REG8(TCCR, 10)
/openbmc/qemu/include/hw/
H A Dregisterfields.h25 #define REG8(reg, addr) \ macro
/openbmc/u-boot/arch/arm/dts/
H A Drk3188-radxarock.dts248 vcca_33: REG8 {
H A Drk3288-rock2-som.dtsi171 vcca_tp: REG8 {
H A Drk3288-evb.dtsi271 vcc_tp: REG8 {
H A Drk3288-miqi.dtsi230 vcca_33: REG8 {
H A Drk3288-firefly.dtsi262 vcca_33: REG8 {
/openbmc/qemu/include/block/
H A Dnvme.h1790 REG8(FDPA, 0x0)