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Searched refs:RADEON_NUM_RINGS (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/radeon/
H A Dradeon_fence.c456 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_any_seq_signaled()
491 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_seq_timeout()
512 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_seq_timeout()
538 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_timeout()
598 uint64_t seq[RADEON_NUM_RINGS]; in radeon_fence_wait_any()
602 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_any()
636 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_next()
663 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_empty()
796 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_note_sync()
873 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_fence_driver_init_ring()
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H A Dradeon_sync.c48 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sync_create()
128 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sync_rings()
H A Dradeon_device.c1298 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_device_init()
1301 rdev->fence_context = dma_fence_context_alloc(RADEON_NUM_RINGS); in radeon_device_init()
1607 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_suspend_kms()
1770 unsigned ring_sizes[RADEON_NUM_RINGS]; in radeon_gpu_reset()
1771 uint32_t *ring_data[RADEON_NUM_RINGS]; in radeon_gpu_reset()
1790 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_gpu_reset()
1808 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_gpu_reset()
H A Dradeon_irq_kms.c130 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_preinstall_kms()
184 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_uninstall_kms()
H A Dradeon_vm.c181 struct radeon_fence *best[RADEON_NUM_RINGS] = {}; in radeon_vm_grab_id()
1007 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_vm_bo_update()
1181 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_vm_init()
1264 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_vm_fini()
H A Dradeon_ib.c261 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_ib_ring_tests()
H A Dradeon.h158 #define RADEON_NUM_RINGS 8 macro
368 uint64_t sync_seq[RADEON_NUM_RINGS];
572 struct radeon_fence *sync_to[RADEON_NUM_RINGS];
754 atomic_t ring_int[RADEON_NUM_RINGS];
903 struct radeon_vm_id ids[RADEON_NUM_RINGS];
1881 const struct radeon_asic_ring *ring[RADEON_NUM_RINGS];
2368 struct radeon_fence_driver fence_drv[RADEON_NUM_RINGS];
2372 struct radeon_ring ring[RADEON_NUM_RINGS];
H A Dradeon_test.c530 for (i = 1; i < RADEON_NUM_RINGS; ++i) { in radeon_test_syncing()
H A Dradeon_pm.c266 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_pm_set_clocks()
1148 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_dpm_change_power_state_locked()
1865 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_dynpm_idle_work_handler()