| /openbmc/u-boot/board/freescale/t4qds/ |
| H A D | law.c | 21 #ifdef QIXIS_BASE_PHYS
22 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| H A D | tlb.c | 123 #ifdef QIXIS_BASE_PHYS
124 SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS,
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| /openbmc/u-boot/board/freescale/t208xqds/ |
| H A D | law.c | 21 #ifdef QIXIS_BASE_PHYS
22 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| H A D | tlb.c | 129 #ifdef QIXIS_BASE_PHYS
130 SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS,
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| /openbmc/u-boot/board/freescale/t102xqds/ |
| H A D | law.c | 20 #ifdef QIXIS_BASE_PHYS
21 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| H A D | tlb.c | 97 SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS,
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| /openbmc/u-boot/board/freescale/t1040qds/ |
| H A D | law.c | 20 #ifdef QIXIS_BASE_PHYS
21 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| H A D | tlb.c | 100 SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS,
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| /openbmc/u-boot/include/configs/ |
| H A D | B4860QDS.h | 253 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) macro
255 #define QIXIS_BASE_PHYS QIXIS_BASE macro
268 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| H A D | T102xQDS.h | 269 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) macro
271 #define QIXIS_BASE_PHYS QIXIS_BASE macro
285 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| H A D | ls2080a_common.h | 124 #define QIXIS_BASE_PHYS 0x20000000 macro
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| H A D | ls1043aqds.h | 208 #define QIXIS_BASE_PHYS QIXIS_BASE macro
228 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
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| H A D | ls1046aqds.h | 236 #define QIXIS_BASE_PHYS QIXIS_BASE macro
256 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
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| H A D | T4240QDS.h | 183 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) macro
186 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| H A D | ls1021aqds.h | 212 #define QIXIS_BASE_PHYS QIXIS_BASE macro
234 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
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| H A D | ls1088a_common.h | 120 #define QIXIS_BASE_PHYS 0x20000000 macro
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| H A D | T1040QDS.h | 196 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) macro
209 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| H A D | T208xQDS.h | 256 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) macro
259 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| H A D | ls1088ardb.h | 181 #define SYS_FPGA_CSPR_FINAL (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| H A D | ls2080aqds.h | 182 #define CONFIG_SYS_CSPR3_FINAL (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| H A D | ls2080ardb.h | 185 #define CONFIG_SYS_CSPR3_FINAL (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| /openbmc/u-boot/board/freescale/b4860qds/ |
| H A D | law.c | 18 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| H A D | tlb.c | 113 SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS,
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| /openbmc/u-boot/board/freescale/ls2080aqds/ |
| H A D | ls2080aqds.c | 46 addr = QIXIS_BASE_PHYS; in get_qixis_addr()
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| /openbmc/u-boot/board/freescale/ls2080ardb/ |
| H A D | ls2080ardb.c | 47 addr = QIXIS_BASE_PHYS; in get_qixis_addr()
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