/openbmc/qemu/pc-bios/s390-ccw/ |
H A D | s390-arch.h | 14 typedef struct PSW { struct 17 } __attribute__ ((aligned(8))) PSW; typedef 18 _Static_assert(sizeof(struct PSW) == 16, "PSW size incorrect"); 81 PSW restart_old_psw; /* 0x120 */ 82 PSW external_old_psw; /* 0x130 */ 83 PSW svc_old_psw; /* 0x140 */ 84 PSW program_old_psw; /* 0x150 */ 85 PSW mcck_old_psw; /* 0x160 */ 86 PSW io_old_psw; /* 0x170 */ 88 PSW restart_new_psw; /* 0x1a0 */ [all …]
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/openbmc/qemu/target/rx/ |
H A D | cpu.h | 30 REG32(PSW, 0) 31 FIELD(PSW, C, 0, 1) 32 FIELD(PSW, Z, 1, 1) 33 FIELD(PSW, S, 2, 1) 34 FIELD(PSW, O, 3, 1) 35 FIELD(PSW, I, 16, 1) 36 FIELD(PSW, U, 17, 1) 37 FIELD(PSW, PM, 20, 1) 38 FIELD(PSW, IPL, 24, 4) 157 *flags = FIELD_DP32(0, PSW, PM, env->psw_pm); in cpu_get_tb_cpu_state() [all …]
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H A D | helper.c | 29 env->psw_ipl = FIELD_EX32(psw, PSW, IPL); in rx_cpu_unpack_psw() 32 env->psw_pm = FIELD_EX32(psw, PSW, PM); in rx_cpu_unpack_psw() 34 env->psw_u = FIELD_EX32(psw, PSW, U); in rx_cpu_unpack_psw() 35 env->psw_i = FIELD_EX32(psw, PSW, I); in rx_cpu_unpack_psw() 37 env->psw_o = FIELD_EX32(psw, PSW, O) << 31; in rx_cpu_unpack_psw() 38 env->psw_s = FIELD_EX32(psw, PSW, S) << 31; in rx_cpu_unpack_psw() 39 env->psw_z = 1 - FIELD_EX32(psw, PSW, Z); in rx_cpu_unpack_psw() 40 env->psw_c = FIELD_EX32(psw, PSW, C); in rx_cpu_unpack_psw()
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H A D | translate.c | 239 if (FIELD_EX32(ctx->tb_flags, PSW, PM)) { in is_privileged() 328 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_from_cr() 344 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_from_cr() 382 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_to_cr() 398 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_to_cr() 2075 if (FIELD_EX32(ctx->tb_flags, PSW, U) != val) { in clrsetpsw() 2076 ctx->tb_flags = FIELD_DP32(ctx->tb_flags, PSW, U, val); in clrsetpsw()
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/openbmc/qemu/target/tricore/ |
H A D | helper.c | 101 switch (extract32(env->PSW, 24, 2)) { in fpu_set_state() 125 env->PSW &= 0x7ffffff; in psw_read() 127 env->PSW |= ((env->PSW_USB_C != 0) << 31); in psw_read() 128 env->PSW |= ((env->PSW_USB_V & (1 << 31)) >> 1); in psw_read() 129 env->PSW |= ((env->PSW_USB_SV & (1 << 31)) >> 2); in psw_read() 130 env->PSW |= ((env->PSW_USB_AV & (1 << 31)) >> 3); in psw_read() 131 env->PSW |= ((env->PSW_USB_SAV & (1 << 31)) >> 4); in psw_read() 133 return env->PSW; in psw_read() 143 env->PSW = val; in psw_write()
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H A D | cpu.h | 36 uint32_t PSW; member 264 extract32(env->PSW, 10, 2)); in cpu_get_tb_cpu_state()
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H A D | fpu_helper.c | 113 env->PSW |= 1 << 26; in f_update_psw_flags() 578 env->PSW &= ~(extract32(arg, 10, 1) << 26); in helper_updfl() 579 env->PSW |= (extract32(arg, 2, 1) & extract32(arg, 10, 1)) << 26; in helper_updfl()
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H A D | op_helper.c | 61 if ((env->PSW & MASK_PSW_IS) == 0) { in raise_exception_sync_internal() 64 env->PSW |= MASK_PSW_IS; in raise_exception_sync_internal() 67 env->PSW |= (2 << 10); in raise_exception_sync_internal() 70 env->PSW &= ~MASK_PSW_PRS; in raise_exception_sync_internal() 74 env->PSW &= ~MASK_PSW_CDC; in raise_exception_sync_internal() 77 env->PSW |= MASK_PSW_CDE; in raise_exception_sync_internal() 81 env->PSW &= ~MASK_PSW_GW; in raise_exception_sync_internal() 2570 env->PSW |= MASK_PSW_CDE; in helper_call() 2719 if (!cdc_zero(&(env->PSW)) && (env->PSW & MASK_PSW_CDE)) { in helper_rfe()
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H A D | csfr.h.inc | 7 NOTE: PSW is handled as a special case in gen_mtcr/mfcr */
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/openbmc/qemu/target/s390x/ |
H A D | s390x-internal.h | 54 PSW restart_old_psw; /* 0x120 */ 55 PSW external_old_psw; /* 0x130 */ 56 PSW svc_old_psw; /* 0x140 */ 57 PSW program_old_psw; /* 0x150 */ 58 PSW mcck_old_psw; /* 0x160 */ 59 PSW io_old_psw; /* 0x170 */ 61 PSW restart_new_psw; /* 0x1a0 */ 62 PSW external_new_psw; /* 0x1b0 */ 63 PSW svc_new_psw; /* 0x1c0 */ 64 PSW program_new_psw; /* 0x1d0 */ [all …]
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H A D | cpu.h | 50 typedef struct PSW { struct 53 } PSW; argument 78 PSW psw;
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H A D | helper.c | 180 PSW psw; /* 0x0100 */
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/openbmc/linux/arch/sh/boards/mach-highlander/ |
H A D | irq-r7780rp.c | 20 PSW, /* Push Switch */ enumerator 35 INTC_IRQ(PSW, IRQ_PSW), 42 0, 0, 0, 0, 0, 0, PSW, AX88796 } },
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H A D | irq-r7780mp.c | 25 PSW, /* Push Switch */ enumerator 39 INTC_IRQ(PSW, IRQ_PSW), 49 0, EXT6, EXT5, EXT4, EXT2, EXT1, PSW, AX88796 } },
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/openbmc/linux/Documentation/translations/zh_CN/arch/parisc/ |
H A D | registers.rst | 37 CR22 中断 PSW 102 PSW W 默认值 0 103 PSW E 默认值 0
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H A D | debugging.rst | 41 某些非常关键的代码必须清除PSW中的Q位。当Q位被清除时,CPU不会更新中断处理
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/openbmc/linux/arch/s390/kernel/ |
H A D | text_amode31.S | 121 larl %r4,continue_psw # Save PSW flags 124 larl %r4,.Lrestart_part2 # Setup restart PSW at absolute 0 126 og %r4,0(%r3) # Save PSW 143 larl %r4,continue_psw # Restore PSW flags
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H A D | entry.S | 241 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There 356 1: tmhh %r8,0x4000 # PER bit set in old PSW ?
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/openbmc/linux/Documentation/arch/parisc/ |
H A D | registers.rst | 27 CR22 Interrupt PSW 92 PSW default W value 0 93 PSW default E value 0
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H A D | debugging.rst | 38 Certain, very critical code has to clear the Q bit in the PSW. What
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/openbmc/u-boot/arch/nds32/cpu/n1213/ag101/ |
H A D | watchdog.S | 26 ! Disable Interrupts by clear GIE in $PSW reg
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/openbmc/u-boot/arch/nds32/cpu/n1213/ |
H A D | start.S | 30 #define PSW $ir0 macro 31 #define EIT_INTR_PSW $ir1 ! interruption $PSW 398 mfsr $r28, PSW ! $PSW
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/openbmc/qemu/qapi/ |
H A D | run-state.json | 563 # @extint-loop: clock comparator or cpu timer interrupt with new PSW 566 # @pgmint-loop: program interrupt with BAD new PSW 569 # program interrupt new PSW 583 # S390 specific guest panic information (PSW) 587 # @psw-mask: control fields of guest PSW
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/openbmc/linux/Documentation/virt/kvm/s390/ |
H A D | s390-pv-boot.rst | 57 decrypt and verify the PV, as well as control flags and a start PSW.
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H A D | s390-pv.rst | 60 PSW bit 13 has been changed, indicating that a machine check
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