Home
last modified time | relevance | path

Searched refs:PS (Results 1 – 25 of 64) sorted by relevance

123

/openbmc/qemu/target/xtensa/
H A Dexc_helper.c53 if (env->sregs[PS] & PS_EXCM) { in HELPER()
62 vector = (env->sregs[PS] & PS_UM) ? EXC_USER : EXC_KERNEL; in HELPER()
66 env->sregs[PS] |= PS_EXCM; in HELPER()
92 env->sregs[EPS2 + level - 2] = env->sregs[PS]; in HELPER()
93 env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) | PS_EXCM | in HELPER()
105 env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) | in HELPER()
177 env->sregs[EPS2 + level - 2] = env->sregs[PS]; in handle_interrupt()
178 env->sregs[PS] in handle_interrupt()
[all...]
H A Dwin_helper.c105 int callinc = (env->sregs[PS] & PS_CALLINC) >> PS_CALLINC_SHIFT; in HELPER()
122 env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) | in HELPER()
157 pc, env->sregs[PS], m, n); in HELPER()
172 env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) | in HELPER()
195 xtensa_rotate_window_abs(env, (env->sregs[PS] & PS_OWB) >> PS_OWB_SHIFT); in xtensa_restore_owb()
H A Dcpu.c65 if (env->sregs[PS] & PS_EXCM) { in xtensa_get_tb_cpu_state()
110 (env->sregs[PS] & (PS_WOE | PS_EXCM)) == PS_WOE) { in xtensa_get_tb_cpu_state()
116 flags |= extract32(env->sregs[PS], PS_CALLINC_SHIFT, in xtensa_get_tb_cpu_state()
184 env->sregs[PS] = xtensa_option_enabled(env->config, in xtensa_cpu_reset_hold()
188 env->sregs[PS] = PS_UM | (3 << PS_RING_SHIFT); in xtensa_cpu_reset_hold()
192 env->sregs[PS] |= PS_WOE; in xtensa_cpu_reset_hold()
H A Dcpu.h158 PS = 230, enumerator
662 int level = (env->sregs[PS] & PS_INTLEVEL) >> PS_INTLEVEL_SHIFT; in xtensa_get_cintlevel()
663 if ((env->sregs[PS] & PS_EXCM) && env->config->excm_level > level) { in xtensa_get_cintlevel()
674 return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; in xtensa_get_ring()
685 (env->sregs[PS] & PS_EXCM) == 0) { in xtensa_get_cring()
686 return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; in xtensa_get_cring()
/openbmc/qemu/tests/tcg/ppc64/
H A Dbcdsub.c19 #define BCDSUB(T, A, B, PS) \ argument
21 " | 1 << 10 | (" #PS ") << 9 | 65\n\t"
23 #define BCDSUB(T, A, B, PS) "bcdsub. " #T ", " #A ", " #B ", " #PS "\n\t" argument
26 #define TEST(AH, AL, BH, BL, PS, TH, TL, CR6) \ argument
41 BCDSUB(0, 0, 1, PS) \
/openbmc/openbmc/meta-security/recipes-ids/samhain/files/
H A D0006-configure-add-option-for-ps.patch48 -PS=
51 - PS="$ff/ps"
52 - AC_MSG_RESULT([$PS])
56 -if test x$PS = x
61 -AC_DEFINE_UNQUOTED([PSPATH], [_("$PS")], [Path to ps executable])
64 -$PS ax >/dev/null 2>&1
68 - one=`$PS akx | wc -l`
71 - one=`$PS ax | wc -l`
77 -$PS -e >/dev/null 2>&1
79 - two=`$PS -e | wc -l`
[all …]
/openbmc/qemu/target/loongarch/tcg/
H A Dtlb_helper.c120 tlb_ps = FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); in invalidate_tlb_entry()
169 csr_ps = FIELD_EX64(env->CSR_TLBREHI, CSR_TLBREHI, PS); in fill_tlb_entry()
178 csr_ps = FIELD_EX64(env->CSR_TLBIDX, CSR_TLBIDX, PS); in fill_tlb_entry()
206 /* Store page size in field PS */ in loongarch_tlb_search()
207 tlb->tlb_misc = FIELD_DP64(tlb->tlb_misc, TLB_MISC, PS, csr_ps); in loongarch_tlb_search()
244 stlb_ps = FIELD_EX64(env->CSR_STLBPS, CSR_STLBPS, PS); in loongarch_tlb_search()
271 tlb_ps = FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); in helper_tlbsrch()
330 tlb_ps = FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); in helper_tlbfill()
340 env->CSR_TLBIDX = FIELD_DP64(env->CSR_TLBIDX, CSR_TLBIDX, PS, 0); in helper_tlbfill()
345 PS, (tlb_p in helper_tlbfill()
[all...]
H A Dcsr_helper.c29 uint8_t tlb_ps = FIELD_EX64(val, CSR_STLBPS, PS); in helper_csrwr_stlbps()
34 /* Only update PS field, reserved bit keeps zero */ in helper_csrwr_stlbps()
/openbmc/u-boot/board/xilinx/
H A DKconfig8 string "Zynq/ZynqMP PS init file(s) location"
13 configuring pinmuxes. The PS init file (called
17 U-Boot contains PS init files for some boards, but each of
22 There are three ways to give a PS init file to U-Boot:
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/
H A D0006-Platform-CS1000-Increase-buffers-for-EFI-vars.patch12 of the bigger PS assets requires bigger buffer.
13 - The CRYPTO_IOVEC_BUFFER_SIZE needs to be increased because the PS
15 PS partition during encryption.
34 +/* This is needed to be able to process the EFI variables during PS writes. */
H A D0008-Platform-CS1000-Increase-flash-PS-area-size.patch4 Subject: [PATCH 8/9] Platform: CS1000: Increase flash PS area size
7 The aim of this commit is to increase the size of PS storage in SE
/openbmc/qemu/linux-user/xtensa/
H A Dsignal.c116 __put_user(env->sregs[PS], &sc->sc_ps); in setup_sigcontext()
221 abi_call0 = (env->sregs[PS] & PS_WOE) == 0; in setup_rt_frame()
222 env->sregs[PS] = PS_UM | (3 << PS_RING_SHIFT); in setup_rt_frame()
228 env->sregs[PS] |= PS_WOE | (1 << PS_CALLINC_SHIFT); in setup_rt_frame()
261 env->sregs[PS] = deposit32(env->sregs[PS], in restore_sigcontext()
H A Dcpu_loop.c138 env->sregs[PS] &= ~PS_EXCM; in cpu_loop()
194 env->sregs[PS] = deposit32(env->sregs[PS], in cpu_loop()
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_read_leveling.c359 info->rl_val[cs][idx][PS] = phase; in overrun()
689 if (dram_info->rl_val[cs][pup][PS] < phase_min) in ddr3_read_leveling_single_cs_rl_mode()
690 phase_min = dram_info->rl_val[cs][pup][PS]; in ddr3_read_leveling_single_cs_rl_mode()
877 dram_info->rl_val[cs][idx][PS] = in ddr3_read_leveling_single_cs_window_mode()
1095 DEBUG_RL_D((u32) dram_info->rl_val[cs][pup][PS], 1); in ddr3_read_leveling_single_cs_window_mode()
1110 if (dram_info->rl_val[cs][idx][PS] == 4) in ddr3_read_leveling_single_cs_window_mode()
1111 dram_info->rl_val[cs][idx][PS] = 1; in ddr3_read_leveling_single_cs_window_mode()
1115 delay_s = dram_info->rl_val[cs][idx][PS] * in ddr3_read_leveling_single_cs_window_mode()
1132 delay_s = dram_info->rl_val[cs][idx][PS] * in ddr3_read_leveling_single_cs_window_mode()
1148 if (dram_info->rl_val[cs][idx][PS] > 1) in ddr3_read_leveling_single_cs_window_mode()
[all …]
/openbmc/openbmc/meta-security/meta-tpm/recipes-tpm1/trousers/files/
H A Dget-user-ps-path-use-POSIX-getpwent-instead-of-getpwe.patch30 - LogDebugFn("USER PS: Error getting path to home directory: getpwent_r: %s",
38 LogDebugFn("USER PS: Error getting path to home directory: getpwent: %s",
/openbmc/qemu/target/loongarch/
H A Dcpu-csr.h58 FIELD(CSR_TLBIDX, PS, 24, 6)
114 FIELD(CSR_STLBPS, PS, 0, 5)
177 FIELD(CSR_TLBREHI, PS, 0, 6)
/openbmc/qemu/docs/system/arm/
H A Dintegratorcp.rst14 - PL050 KMI with PS/2 keyboard and mouse.
H A Drealview.rst25 - PL050 KMI with PS/2 keyboard and mouse
H A Dxlnx-zynq.rst5 processing system (PS) and AMD programmable logic (PL) in a single device.
/openbmc/u-boot/arch/xtensa/cpu/
H A Dstart.S137 wsr a2, PS
205 wsr a2, PS
449 xsr a3, PS
468 wsr a3, PS
/openbmc/witherspoon-pfault-analysis/
H A Dmeson.options5 description: 'The D-Bus busname root for the PS input history.',
/openbmc/u-boot/board/intel/bayleybay/acpi/
H A Dmainboard.asl12 /* PS/2 keyboard and mouse */
/openbmc/qemu/docs/system/
H A Dtarget-sparc64.rst29 - PS/2 mouse and keyboard
H A Dtarget-i386-desc.rst.inc8 - PS/2 mouse and keyboard
/openbmc/qemu/hw/xtensa/
H A Dpic_cpu.c57 env->pc, env->regs[0], env->sregs[PS], in check_interrupts()

123