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Searched refs:POWER (Results 1 – 25 of 34) sorted by relevance

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/openbmc/u-boot/drivers/usb/musb/
H A Dmusb_debug.h17 MUSB_FLAGS_PRINT(b, POWER, ISOUPDATE); in musb_print_pwr()
18 MUSB_FLAGS_PRINT(b, POWER, SOFTCONN); in musb_print_pwr()
19 MUSB_FLAGS_PRINT(b, POWER, HSENAB); in musb_print_pwr()
20 MUSB_FLAGS_PRINT(b, POWER, HSMODE); in musb_print_pwr()
21 MUSB_FLAGS_PRINT(b, POWER, RESET); in musb_print_pwr()
22 MUSB_FLAGS_PRINT(b, POWER, RESUME); in musb_print_pwr()
23 MUSB_FLAGS_PRINT(b, POWER, SUSPENDM); in musb_print_pwr()
24 MUSB_FLAGS_PRINT(b, POWER, ENSUSPEND); in musb_print_pwr()
/openbmc/openbmc/meta-openembedded/meta-oe/dynamic-layers/meta-python/recipes-connectivity/lirc/lirc/
H A Dlircd.conf27 POWER 0xF0
89 POWER 0x00ff
157 POWER 0x100C
261 POWER 0x10000F
/openbmc/openbmc/meta-openpower/recipes-phosphor/logging/
H A Dopenpower-libhei_git.bb1 SUMMARY = "Hardware Error Isolator for POWER Systems"
5 by POWER Systems chip (processor chips, memory chips, etc.)."
H A Dopenpower-hw-diags_git.bb1 SUMMARY = "Hardware Diagnostics for POWER Systems"
6 POWER Systems have the ability to diagnose the root cause of the failure \
/openbmc/openbmc/meta-openpower/recipes-bsp/pdata/
H A Dpdata_git.bb3 SUMMARY = "POWER Host data management"
4 DESCRIPTION = "Devicetree based POWER host data management"
/openbmc/openpower-hw-diags/
H A DREADME.md1 # Hardware Diagnostics for POWER Systems
4 (processor chips, memory chips, I/O chips, system memory, etc.), POWER Systems
H A Dmeson.options7 description: '''Enable PHAL APIs for retrieving data from the POWER
/openbmc/qemu/docs/specs/
H A Dfsi.rst13 FSI allows a service processor access to the internal buses of a host POWER
14 processor to perform configuration or debugging. FSI has long existed in POWER
18 Working backwards from the POWER processor, the fundamental pieces of interest
22 "engines" that drive accesses on buses internal and external to the POWER
33 driving CFAM engine accesses into the POWER chip. At the hardware level
37 4. The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in POWER
110 pdbg is a simple application to allow debugging of the host POWER processors
/openbmc/docs/designs/
H A Dpower-systems-memory-preserving-reboot.md1 # Memory preserving reboot and System Dump extraction flow on POWER Systems
9 On POWER based servers, a hypervisor firmware manages and allocates resources to
14 required for debugging the fault. Some hypervisors on the POWER based systems
16 failure. A warm reboot with preserving the main memory is needed on the POWER
27 processor, bus, and memory initialization on POWER based servers.
31 of POWER systems to assist in initializing the processor during the boot. It
38 - **POWER Hardware Abstraction Layer (PHAL)**: A software component on the BMC
39 providing access to the POWER hardware.
63 directly on the die of POWER processors. The OCC can be used to controls the
76 When the POWER based server encounters a fault and needs a restart, it alerts
H A Ddevice-tree-gpio-naming.md190 ### POWER Specific GPIOs
192 Below are GPIO names specific to the POWER processor based servers.
200 Utilized to issue a processor logic reset to a IBM POWER processor.
204 Utilized to indicate a IBM POWER processor has entered an unrecoverable error
/openbmc/openpower-pnor-code-mgmt/mmc/
H A Dopenpower-process-host-firmware.service2 Description=Set POWER host firmware well-known names
/openbmc/openbmc/meta-openpower/recipes-bsp/pdbg/
H A Dpdbg_3.6.bb2 DESCRIPTION = "pdbg allows JTAG-like debugging of the host POWER processors"
/openbmc/openpower-proc-control/service_files/
H A Dphal-reinit-devtree.service.in2 Description=Reinit POWER CEC system device tree
/openbmc/docs/designs/oem/ibm/
H A Dsystem-power-mode.md11 Power management on POWER platforms needs assistance from the BMC for managing
14 save parameters. This design is only applicable to POWER processors.
18 Each POWER processor contains an embedded PowerPC 405 processor that is referred
/openbmc/openbmc/meta-openpower/
H A DREADME.md6 any POWER system.
/openbmc/docs/
H A Dfeatures.md37 - [POWER OCC Support][power occ implementation] (On Chip Controller)
38 - [Hardware Diagnostics][] for POWER Systems fatal hardware errors.
/openbmc/openbmc/meta-openpower/recipes-bsp/ecmd/
H A Dlibecmd_git.bb2 DESCRIPTION = "eCMD is a hardware access API for POWER Systems"
/openbmc/qemu/docs/system/
H A Dconfidential-guest-support.rst42 * POWER Protected Execution Facility (PEF) (see :ref:`power-papr-protected-execution-facility-pef`)
/openbmc/openbmc/meta-ibm/
H A DREADME.md4 This layer provides support for the BMC firmware on IBM POWER systems server
/openbmc/qemu/hw/avr/
H A Datmega.c38 #define POWER(n) (n + POWER0) macro
295 int idx = POWER(i); in atmega_realize()
/openbmc/phosphor-webui/app/common/styles/base/
H A Dforms.scss177 <label for="power-cap" class="content-label">POWER CAP VALUE IN WATTS</label>
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/nmon/nmon/
H A D0001-Fix-a-lot-of-Werror-format-security-errors-with-mvpr.patch65 #ifdef POWER
/openbmc/openbmc-test-automation/
H A DREADME.md121 - POWER
336 the POWER architecture. If your host CPU is x86 add
/openbmc/openbmc-test-automation/lib/
H A Dvpd_tool_resource.robot30 # [DR]: CPU POWER CARD
/openbmc/qemu/target/ppc/
H A Dpower8-pmu-regs.c.inc2 * PMU register read/write functions for TCG IBM POWER chips

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