| /openbmc/linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3566-anbernic-rg353x.dtsi | 20 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3566-anbernic-rg503.dts | 109 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3566-radxa-cm3-io.dts | 267 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3568-fastrhino-r66s.dtsi | 474 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3566-box-demo.dts | 469 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3568-nanopi-r5s.dtsi | 574 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3566-lubancat-1.dts | 579 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3568-roc-pc.dts | 637 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3568-odroid-m1.dts | 728 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3568-lubancat-2.dts | 679 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3566-roc-pc.dts | 686 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3566-soquartz.dtsi | 672 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3568-evb1-v10.dts | 676 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3566-quartz64-b.dts | 724 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3566-anbernic-rgxx3.dtsi | 775 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3568-rock-3a.dts | 842 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3568-bpi-r2-pro.dts | 841 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3566-quartz64-a.dts | 824 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| H A D | rk3399.dtsi | 1962 <&cru PLL_VPLL>;
|
| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | rk3399-cru.h | 16 #define PLL_VPLL 7 macro
|
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | rk3399-cru.h | 17 #define PLL_VPLL 7 macro
|
| H A D | rk3568-cru.h | 74 #define PLL_VPLL 5 macro
|
| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk-rk3399.c | 231 [vpll] = PLL(pll_rk3399, PLL_VPLL, "vpll", mux_pll_p, 0, RK3399_PLL_CON(48),
|
| H A D | clk-rk3568.c | 338 [vpll] = PLL(pll_rk3328, PLL_VPLL, "vpll", mux_pll_p,
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | rk3399.dtsi | 1683 <&cru PLL_VPLL>,
|