| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | rk3288-cru.h | 12 #define PLL_NPLL 5 macro
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| H A D | rk3368-cru.h | 24 #define PLL_NPLL 6 macro
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| H A D | rk3328-cru.h | 14 #define PLL_NPLL 5 macro
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| H A D | rk3399-cru.h | 15 #define PLL_NPLL 6 macro
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | px30-cru.h | 10 #define PLL_NPLL 4 macro
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| H A D | rk3328-cru.h | 15 #define PLL_NPLL 5 macro
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| H A D | rk3288-cru.h | 15 #define PLL_NPLL 5 macro
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| H A D | rk3368-cru.h | 15 #define PLL_NPLL 6 macro
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| H A D | rk3399-cru.h | 16 #define PLL_NPLL 6 macro
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| H A D | rockchip,rk3588-cru.h | 22 #define PLL_NPLL 7 macro
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| H A D | rk3568-cru.h | 75 #define PLL_NPLL 6 macro
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| /openbmc/linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3326-odroid-go.dtsi | 207 assigned-clocks = <&cru PLL_NPLL>,
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| H A D | rk3399-gru-scarlet.dtsi | 369 <&cru PLL_NPLL>,
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| H A D | rk3399-gru.dtsi | 354 <&cru PLL_NPLL>,
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| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3288.c | 876 case PLL_NPLL: in rk3288_clk_set_rate()
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| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk-rk3328.c | 227 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
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| H A D | clk-rk3368.c | 140 [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3368_PLL_CON(20),
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| H A D | clk-rk3288.c | 234 [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16),
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| H A D | clk-px30.c | 194 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
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| H A D | clk-rk3399.c | 229 [npll] = PLL(pll_rk3399, PLL_NPLL, "npll", mux_pll_p, 0, RK3399_PLL_CON(40),
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| H A D | clk-rk3568.c | 335 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
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| H A D | clk-rk3588.c | 689 [npll] = PLL(pll_rk3588, PLL_NPLL, "npll", mux_pll_p,
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | rk3399-gru.dtsi | 360 <&cru PLL_NPLL>,
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| H A D | rk3288.dtsi | 606 <&cru PLL_NPLL>, <&cru ACLK_CPU>,
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| /openbmc/linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3288.dtsi | 871 <&cru PLL_NPLL>, <&cru ACLK_CPU>,
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